From patchwork Tue Apr 11 12:29:00 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Pieralisi X-Patchwork-Id: 9675165 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3A3CB60234 for ; Tue, 11 Apr 2017 12:33:50 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2E54528384 for ; Tue, 11 Apr 2017 12:33:50 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 2325C2852D; Tue, 11 Apr 2017 12:33:50 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id CCF6128384 for ; Tue, 11 Apr 2017 12:33:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755140AbdDKMdf (ORCPT ); Tue, 11 Apr 2017 08:33:35 -0400 Received: from foss.arm.com ([217.140.101.70]:59940 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754838AbdDKMaG (ORCPT ); Tue, 11 Apr 2017 08:30:06 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3FAB016A0; Tue, 11 Apr 2017 05:30:06 -0700 (PDT) Received: from red-moon.cambridge.arm.com (red-moon.cambridge.arm.com [10.1.206.55]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id E8EDF3F581; Tue, 11 Apr 2017 05:30:04 -0700 (PDT) From: Lorenzo Pieralisi To: linux-pci@vger.kernel.org Cc: linux-arch@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Lorenzo Pieralisi , Bjorn Helgaas , "James E.J. Bottomley" , Helge Deller Subject: [PATCH v3 20/32] parisc: include default ioremap_nopost() implementation Date: Tue, 11 Apr 2017 13:29:00 +0100 Message-Id: <20170411122923.6285-21-lorenzo.pieralisi@arm.com> X-Mailer: git-send-email 2.10.0 In-Reply-To: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> References: <20170411122923.6285-1-lorenzo.pieralisi@arm.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The PCI specifications (Rev 3.0, 3.2.5 "Transaction Ordering and Posting") mandate non-posted configuration transactions. As further highlighted in the PCIe specifications (4.0 - Rev0.3, "Ordering Considerations for the Enhanced Configuration Access Mechanism"), through ECAM and ECAM-derivative configuration mechanism, the memory mapped transactions from the host CPU into Configuration Requests on the PCI express fabric may create ordering problems for software because writes to memory address are typically posted transactions (unless the architecture can enforce through virtual address mapping non-posted write transactions behaviour) but writes to Configuration Space are not posted on the PCI express fabric. Include the asm-generic ioremap_nopost() implementation (currently falling back to ioremap_nocache()) to provide a non-posted writes ioremap interface to kernel subsystems. Signed-off-by: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: "James E.J. Bottomley" Cc: Helge Deller --- arch/parisc/include/asm/io.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/parisc/include/asm/io.h b/arch/parisc/include/asm/io.h index 1a16f1d..373ba75 100644 --- a/arch/parisc/include/asm/io.h +++ b/arch/parisc/include/asm/io.h @@ -139,6 +139,7 @@ static inline void __iomem * ioremap(unsigned long offset, unsigned long size) #define ioremap_nocache(off, sz) ioremap((off), (sz)) #define ioremap_wc ioremap_nocache #define ioremap_uc ioremap_nocache +#include extern void iounmap(const volatile void __iomem *addr);