From patchwork Thu May 4 20:10:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 9712653 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 6A21B60235 for ; Thu, 4 May 2017 20:10:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5B51B286F6 for ; Thu, 4 May 2017 20:10:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4F1F2286D2; Thu, 4 May 2017 20:10:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BAC0D286D5 for ; Thu, 4 May 2017 20:10:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752241AbdEDUKi (ORCPT ); Thu, 4 May 2017 16:10:38 -0400 Received: from mail-wm0-f67.google.com ([74.125.82.67]:36502 "EHLO mail-wm0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751749AbdEDUKh (ORCPT ); Thu, 4 May 2017 16:10:37 -0400 Received: by mail-wm0-f67.google.com with SMTP id u65so5673597wmu.3; Thu, 04 May 2017 13:10:36 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=SqINw8D1Pen6Rm1u2j+91+hoeG2VbxuU4Iw4lJM1UiA=; b=gjXmUtFT1gO2HJy3xobELtwizMpBS2C6rV7rifVHyido3GYd+SSfTzKXZgDWtFqk8Z 8+rdO5aAj7ic2aVYcH3a7F5PmQw9YJZu773B/KoRdQuK0Bcq7pFr9fl839qMrEKuJXMU 97dtqG84RS9TCeRiSPwsTUeQ3K/Wcbdn/hiWzS5zlJiPFpMpwLnr9TmIochNNTogRlTm ngGuiki3P+1NJuh4l06C4Mjsgupzt2sQKls5G98rZWxBwrgF9NIs8ZOPKy25OQX6hyIf qIMoZM8s2hCDEebWrRLD7NSLMDtcW+eydTXw6JRaJRuyQunsqI8o11AxCcQIWg2fcrtr ZjaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=SqINw8D1Pen6Rm1u2j+91+hoeG2VbxuU4Iw4lJM1UiA=; b=k4Z8F9ZIp6a1UhmE2YulAxCIHRWYKfvUQnKnx4JazIXUbmzpxhy/OrtWIUduZgWpau zyTNWQ39IlmFyARiBjxhhWLP4d+VBLl+9EZQ5RFSVZRAZ0Yxv3sZRF122Lv0azYf9Y86 MB+fYgatxQi4u3WuEcGCJ2W8cMkkQBxgyC0/9pAVe0x8D3fuLiypH3VNHNpRX9bqQj7Z nLR0nMH2a8QbViMAia4XuQ5yCKYO8adObIG0RW0Ku4cNd9993JAbFu1irxGLqOwOtkJ5 kFjsS/iZLV43hs5rrCbg27CyOd/cUp9eSUudc1gIVANJfhts80hKtQaviSqKzt0RhKNU bsMg== X-Gm-Message-State: AN3rC/719e7nTAhtfgeTqBSB6tb/93XcTMXwtelDlRiGIZU3fEOeMHDB C0d4XCSJe+CHhQ== X-Received: by 10.80.139.65 with SMTP id l59mr4961348edl.52.1493928635000; Thu, 04 May 2017 13:10:35 -0700 (PDT) Received: from localhost (port-52529.pppoe.wtnet.de. [46.59.205.215]) by smtp.gmail.com with ESMTPSA id f38sm891614edd.10.2017.05.04.13.10.33 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 04 May 2017 13:10:34 -0700 (PDT) From: Thierry Reding To: Bjorn Helgaas Cc: Jonathan Hunter , Stephen Warren , linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 2/2] PCI: tegra: Do not allocate MSI target memory Date: Thu, 4 May 2017 22:10:32 +0200 Message-Id: <20170504201032.32633-2-thierry.reding@gmail.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170504201032.32633-1-thierry.reding@gmail.com> References: <20170504201032.32633-1-thierry.reding@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding The PCI host bridge found on Tegra SoCs doesn't require the MSI target address to be backed by physical system memory. Writes are intercepted within the controller and never make it to the memory pointed to. Since no actual system memory is required, remove the allocation of a single page and hardcode the MSI target address with a special address that maps to the last 4 KiB page within the range that is reserved for system memory and memory-mapped I/O in the FPCI address map. Signed-off-by: Thierry Reding --- drivers/pci/host/pci-tegra.c | 22 ++++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-) diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index e69f828a9ab2..4f795a5dcbed 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -233,7 +233,6 @@ struct tegra_msi { struct msi_controller chip; DECLARE_BITMAP(used, INT_PCI_MSI_NR); struct irq_domain *domain; - unsigned long pages; struct mutex lock; u64 phys; int irq; @@ -1550,9 +1549,22 @@ static int tegra_pcie_enable_msi(struct tegra_pcie *pcie) goto err; } - /* setup AFI/FPCI range */ - msi->pages = __get_free_pages(GFP_KERNEL, 0); - msi->phys = virt_to_phys((void *)msi->pages); + /* + * The PCI host bridge on Tegra contains some logic that intercepts + * MSI writes, which means that the MSI target address doesn't have + * to point to actual physical memory. Rather than allocating one 4 + * KiB page of system memory that's never used, we can simply pick + * an arbitrary address within an area reserved for system memory + * in the FPCI address map. + * + * However, in order to avoid confusion, we pick an address that + * doesn't map to physical memory. The FPCI address map reserves a + * 1012 GiB region for system memory and memory-mapped I/O. Since + * none of the Tegra SoCs that contain this PCI host bridge can + * address more than 16 GiB of system memory, the last 4 KiB of + * these 1012 GiB is a good candidate. + */ + msi->phys = 0xfcfffff000; afi_writel(pcie, msi->phys >> soc->msi_base_shift, AFI_MSI_FPCI_BAR_ST); afi_writel(pcie, msi->phys, AFI_MSI_AXI_BAR_ST); @@ -1604,8 +1616,6 @@ static int tegra_pcie_disable_msi(struct tegra_pcie *pcie) afi_writel(pcie, 0, AFI_MSI_EN_VEC6); afi_writel(pcie, 0, AFI_MSI_EN_VEC7); - free_pages(msi->pages, 0); - if (msi->irq > 0) free_irq(msi->irq, pcie);