From patchwork Thu Jun 15 05:06:40 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexey Kardashevskiy X-Patchwork-Id: 9788057 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 7F78C60384 for ; Thu, 15 Jun 2017 05:16:04 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 70F9F2823D for ; Thu, 15 Jun 2017 05:16:04 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 63B1628417; Thu, 15 Jun 2017 05:16:04 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E7AA12823D for ; Thu, 15 Jun 2017 05:16:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751888AbdFOFQC (ORCPT ); Thu, 15 Jun 2017 01:16:02 -0400 Received: from ozlabs.ru ([107.173.13.209]:34876 "EHLO ozlabs.ru" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750784AbdFOFQB (ORCPT ); Thu, 15 Jun 2017 01:16:01 -0400 X-Greylist: delayed 553 seconds by postgrey-1.27 at vger.kernel.org; Thu, 15 Jun 2017 01:16:01 EDT Received: from vpl2.ozlabs.ibm.com (localhost [IPv6:::1]) by ozlabs.ru (Postfix) with ESMTP id 432DE3A60021; Thu, 15 Jun 2017 01:07:26 -0400 (EDT) From: Alexey Kardashevskiy To: linuxppc-dev@lists.ozlabs.org Cc: Alexey Kardashevskiy , kvm@vger.kernel.org, linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org, Yongji Xie , Alex Williamson , Benjamin Herrenschmidt , Gavin Shan , Paul Mackerras , David Gibson , Yongji Xie , Paul Mackerras Subject: [PATCH kernel 1/3] PCI: Add a new PCI_BUS_FLAGS_MSI_REMAP flag Date: Thu, 15 Jun 2017 15:06:40 +1000 Message-Id: <20170615050642.8197-2-aik@ozlabs.ru> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20170615050642.8197-1-aik@ozlabs.ru> References: <20170615050642.8197-1-aik@ozlabs.ru> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Yongji Xie We introduce a new pci_bus_flags, PCI_BUS_FLAGS_MSI_REMAP which indicates interrupts of all devices on the bus are managed by the hardware enabling IRQ remapping(intel naming). When the capability is enabled, a given PCI device can only shoot the MSIs assigned for it. In other words, the hardware can protect system from invalid MSIs of the device by checking the target address and data when there is something wrong with MSI part in device or device driver. There is a existing flag for this capability in the IOMMU space: enum iommu_cap { IOMMU_CAP_CACHE_COHERENCY, ---> IOMMU_CAP_INTR_REMAP, IOMMU_CAP_NOEXEC, }; and Eric also posted a patchset [1] to abstract it on MSI controller side for ARM. But it would make sense to have a more common flag like PCI_BUS_FLAGS_MSI_REMAP so that we can use a universal flag to test this capability on PCI side for different archs. With this flag enabled, we can easily know whether it's safe to expose MSI-X tables of PCI BARs to userspace. Some usespace drivers such as VFIO may benefit from this. [1] https://www.mail-archive.com/linux-kernel%40vger.kernel.org/msg1138820.html Signed-off-by: Yongji Xie Signed-off-by: Paul Mackerras --- include/linux/pci.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/linux/pci.h b/include/linux/pci.h index 8039f9f0ca05..2c6dbb3dd0da 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h @@ -200,6 +200,7 @@ enum pci_bus_flags { PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, PCI_BUS_FLAGS_NO_AERSID = (__force pci_bus_flags_t) 4, + PCI_BUS_FLAGS_MSI_REMAP = (__force pci_bus_flags_t) 8, }; /* These values come from the PCI Express Spec */