@@ -364,11 +364,13 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset)
*
* Mapping the whole extended configuration space would require 256 MiB of
* virtual address space, only a small part of which will actually be used.
- * To work around this, a 4K of region is used to generate required
- * configuration transaction with relevant B:D:F values. This is achieved by
- * dynamically programming base address and size of AFI_AXI_BAR used for
- * end point config space mapping to make sure that the address (access to
- * which generates correct config transaction) falls in this 4K region
+ *
+ * To work around this, a 4 KiB region is used to generate the required
+ * configuration transaction with relevant B:D:F and register offset values.
+ * This is achieved by dynamically programming base address and size of
+ * AFI_AXI_BAR used for end point config space mapping to make sure that the
+ * address (access to which generates correct config transaction) falls in
+ * this 4 KiB region.
*/
static unsigned long tegra_pcie_conf_offset(unsigned char b, unsigned int devfn,
int where)