From patchwork Thu Dec 14 13:45:43 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thierry Reding X-Patchwork-Id: 10112199 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 0E2C360352 for ; Thu, 14 Dec 2017 13:46:06 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id F2F0428A3C for ; Thu, 14 Dec 2017 13:46:05 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E770F28FFC; Thu, 14 Dec 2017 13:46:05 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 782EF28A3C for ; Thu, 14 Dec 2017 13:46:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753168AbdLNNp5 (ORCPT ); Thu, 14 Dec 2017 08:45:57 -0500 Received: from mail-qk0-f196.google.com ([209.85.220.196]:41464 "EHLO mail-qk0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753129AbdLNNpz (ORCPT ); Thu, 14 Dec 2017 08:45:55 -0500 Received: by mail-qk0-f196.google.com with SMTP id 84so6254591qks.8; Thu, 14 Dec 2017 05:45:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RdZ1uFShzY+JuTwN6tgcRkGXXuykHcWSr3kpHuIQqQM=; b=L+g+gs/wTvUaT+jgfJpi0eUxraRI7Xsu/ff2ZfPxn2lTrSO0zrYWnaYvueA1mMGl9F HM/ILKe/3vbV8DHs+ePAAew1mcIS7UgZl2oXvZ7SinwLxfyfJp4l9LiWn72sqtuAhIS7 anuv1uUtp2DtnJTFGxQg8RdCIUm3o7srBpF1I+FrgFTg1mcq9mQ7OyTWalPQcsLXVAcz Urgc9C1JT5qM4yUqlbsIXv6nf7auMG4xpiXUYaau15bn6JF0Np1NLXCrvMnQlIsDnD6t pIvBLALJO82jCdg189bZ/pQNpHQcFomoqqvRoSGkIqXyrN/dxU5DtTdI/ZC5Pao9KYeh nM5Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RdZ1uFShzY+JuTwN6tgcRkGXXuykHcWSr3kpHuIQqQM=; b=mz62awptdoeLd9CzHXTNHyRspu7FmMoC6CPz/0Md42Vt0c0N2/XvdjCVy/E8nal2e1 0GhjHfp6y4UlG5Kts9JYqm0L1rlQ4LM1qXchCulUNSu+MuA6roAAfcDDHNjZ2j4vMK0q bXfdhy2IAOJp/awwbKBmVP2CZQBCi4IXTVNX87t69XnEO9kFxvSpjY33MK6dZxdz96FU TRjQLlZXJ/9b2tevKAfaDEykGHMia0307sgffPvXJ4OC8NWhVUuzsXkkTREy4x3PSiFF NIWV/yQHEibPk/No7VLP0IDnLJwW9/rvkODPtS8ZcpPnAmQMQwXv3Jvtrm47Mb24ycFu k6jg== X-Gm-Message-State: AKGB3mJSUqbj+WsI6mmrCmgVFWHwfC5/vPn50wbX/VIV5AW6tYZLzY28 L3MYZ0P8yhTBwESfAFqQmWg= X-Google-Smtp-Source: ACJfBosN0/hRMJrl+S40QRlfha/iTo3y87tt0MVpqxfbcMXQz+IJ9QFqMPDdlyrr0aTd0LtCt6Phzg== X-Received: by 10.55.156.17 with SMTP id f17mr15946508qke.217.1513259154434; Thu, 14 Dec 2017 05:45:54 -0800 (PST) Received: from localhost (p200300E41F200F003F65F430A8AE2E44.dip0.t-ipconnect.de. [2003:e4:1f20:f00:3f65:f430:a8ae:2e44]) by smtp.gmail.com with ESMTPSA id w41sm2509581qtc.19.2017.12.14.05.45.53 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 14 Dec 2017 05:45:53 -0800 (PST) From: Thierry Reding To: Lorenzo Pieralisi , Bjorn Helgaas Cc: Jonathan Hunter , Vidya Saga , Manikanta Maddireddy , linux-pci@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 2/4] PCI: tegra: Reorder parameters in offset computations Date: Thu, 14 Dec 2017 14:45:43 +0100 Message-Id: <20171214134545.11143-3-thierry.reding@gmail.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20171214134545.11143-1-thierry.reding@gmail.com> References: <20171214134545.11143-1-thierry.reding@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Thierry Reding The current computation of the configuration space offset is slightly difficult to read because the fields aren't naturally ordered. This is no doubt done to put extended register and register fields together, but that's confusing because they are separate in the address mapping given in the comment above the computations. Signed-off-by: Thierry Reding --- drivers/pci/host/pci-tegra.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/pci/host/pci-tegra.c b/drivers/pci/host/pci-tegra.c index 8a07c6f9e1b0..26b734c84850 100644 --- a/drivers/pci/host/pci-tegra.c +++ b/drivers/pci/host/pci-tegra.c @@ -372,11 +372,11 @@ static inline u32 pads_readl(struct tegra_pcie *pcie, unsigned long offset) * address (access to which generates correct config transaction) falls in * this 4 KiB region. */ -static unsigned long tegra_pcie_conf_offset(unsigned char b, unsigned int devfn, - int where) +static unsigned int tegra_pcie_conf_offset(u8 bus, unsigned int devfn, + unsigned int where) { - return (b << 16) | (PCI_SLOT(devfn) << 11) | (PCI_FUNC(devfn) << 8) | - (((where & 0xf00) >> 8) << 24) | (where & 0xff); + return ((where & 0xf00) << 16) | (bus << 16) | (PCI_SLOT(devfn) << 11) | + (PCI_FUNC(devfn) << 8) | (where & 0xff); } static int tegra_pcie_add_bus(struct pci_bus *bus)