From patchwork Tue Dec 26 02:36:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jeffy Chen X-Patchwork-Id: 10132791 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 075BD60388 for ; Tue, 26 Dec 2017 02:38:03 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id ECDD72E141 for ; Tue, 26 Dec 2017 02:38:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id E1FAA2E846; Tue, 26 Dec 2017 02:38:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id BEA4C2E141 for ; Tue, 26 Dec 2017 02:38:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1750806AbdLZChs (ORCPT ); Mon, 25 Dec 2017 21:37:48 -0500 Received: from regular1.263xmail.com ([211.150.99.140]:44045 "EHLO regular1.263xmail.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751708AbdLZChn (ORCPT ); Mon, 25 Dec 2017 21:37:43 -0500 Received: from jeffy.chen?rock-chips.com (unknown [192.168.167.12]) by regular1.263xmail.com (Postfix) with ESMTP id EEAF74ACC; Tue, 26 Dec 2017 10:37:39 +0800 (CST) X-263anti-spam: KSV:0; X-MAIL-GRAY: 0 X-MAIL-DELIVERY: 1 X-KSVirus-check: 0 X-ABS-CHECKED: 4 Received: from localhost (localhost [127.0.0.1]) by smtp.263.net (Postfix) with ESMTPA id 3E29D3F2; Tue, 26 Dec 2017 10:37:17 +0800 (CST) X-RL-SENDER: jeffy.chen@rock-chips.com X-FST-TO: linux-kernel@vger.kernel.org X-SENDER-IP: 103.29.142.67 X-LOGIN-NAME: jeffy.chen@rock-chips.com X-UNIQUE-TAG: <5a43c4ee60b895b0a29bad2323858f2a> X-ATTACHMENT-NUM: 0 X-SENDER: cjf@rock-chips.com X-DNS-TYPE: 0 Received: from localhost (unknown [103.29.142.67]) by smtp.263.net (Postfix) whith ESMTP id 254306I0J8X; Tue, 26 Dec 2017 10:37:31 +0800 (CST) From: Jeffy Chen To: linux-kernel@vger.kernel.org, bhelgaas@google.com Cc: linux-pm@vger.kernel.org, tony@atomide.com, shawn.lin@rock-chips.com, briannorris@chromium.org, rjw@rjwysocki.net, dianders@chromium.org, Jeffy Chen , devicetree@vger.kernel.org, linux-pci@vger.kernel.org, Rob Herring , Mark Rutland Subject: [RFC PATCH v12 1/5] dt-bindings: PCI: Add definition of PCIe WAKE# irq and PCI irq Date: Tue, 26 Dec 2017 10:36:42 +0800 Message-Id: <20171226023646.17722-2-jeffy.chen@rock-chips.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20171226023646.17722-1-jeffy.chen@rock-chips.com> References: <20171226023646.17722-1-jeffy.chen@rock-chips.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP We are going to handle PCIe WAKE# pin for PCI devices in the pci core, so add definitions of the optional PCIe WAKE# pin for PCI devices. Also add an definition of the optional PCI interrupt pin for PCI devices to distinguish it from the PCIe WAKE# pin. Signed-off-by: Jeffy Chen Reviewed-by: Rob Herring --- Changes in v13: None Changes in v12: Only add irq definitions for PCI devices and rewrite the commit message. Changes in v11: None Changes in v10: None Changes in v9: Add section for PCI devices and rewrite the commit message. Changes in v8: Add optional "pci", and rewrite commit message. Changes in v7: None Changes in v6: None Changes in v5: Move to pci.txt Changes in v3: None Changes in v2: None Documentation/devicetree/bindings/pci/pci.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt index c77981c5dd18..3045ac452f27 100644 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ b/Documentation/devicetree/bindings/pci/pci.txt @@ -24,3 +24,13 @@ driver implementation may support the following properties: unsupported link speed, for instance, trying to do training for unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2' for gen2, and '1' for gen1. Any other values are invalid. + +PCI devices may support the following properties: + +- interrupts: Interrupt specifier for each name in interrupt-names. +- interrupt-names: + May contain "wakeup" for PCIe WAKE# interrupt and "pci" for PCI interrupt. + The PCI devices may optionally include an 'interrupts' property that + represents the legacy PCI interrupt. And when we try to specify the PCIe + WAKE# pin, a corresponding 'interrupt-names' property is required to + distinguish them.