From patchwork Thu Jan 11 13:23:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Christian_K=C3=B6nig?= X-Patchwork-Id: 10157993 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 5573660170 for ; Thu, 11 Jan 2018 13:23:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1906628700 for ; Thu, 11 Jan 2018 13:23:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 0DACB2878C; Thu, 11 Jan 2018 13:23:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 6A59728700 for ; Thu, 11 Jan 2018 13:23:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754170AbeAKNXh (ORCPT ); Thu, 11 Jan 2018 08:23:37 -0500 Received: from mail-wr0-f196.google.com ([209.85.128.196]:33941 "EHLO mail-wr0-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753165AbeAKNXf (ORCPT ); Thu, 11 Jan 2018 08:23:35 -0500 Received: by mail-wr0-f196.google.com with SMTP id 36so2166795wrh.1; Thu, 11 Jan 2018 05:23:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ur/pS+y8XRO2uzrckJnKEhY9ff1R/1x2N8Q1j98M4HI=; b=unSzJlQurR1a16nmlJzN6VFuY+mncZkgJlUR0cFO0H5R+ztjZrWCQPA0+GL5KxpqBB AtS+Z7aaz2v8VPyi02UP7Ye3T5Q/tTPSKXT0AYKdGYhSf5ppqZu93o27wtaqFpziIu5M i+PxsFtHbSQfmZCyDuvaINCyQBfjkn+ykwRF+2WwpQgWbOSnYuMqmP6ixjTmxks+yq4V ahjI54SAN4MKpBd4J04LUzgaHHHB5nP0M68EWR//L6WdkuFO/IkrtN9H+bR5HRuTWHAi OwvC0ggmFOxcF0AI51R5Pj6HDkOOl6wONKDn0nwn/5a6/w50Gtlt7qxuYxokfZuElUox nMvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=ur/pS+y8XRO2uzrckJnKEhY9ff1R/1x2N8Q1j98M4HI=; b=GF72N1foV2I7XY3rO3EYhsWBZUd0crP6bAJOfhr84VaWoABU+nBuSqLTaOfQTCV2gm a+n3c0AaN0GGnqA4YUfk2REnEEScmsJ7cEkRbEzAB96EMiIG4aZjFPzDLBoMgnDuJwF0 5iDcty6UTJ4syr9njRVMik+XPsZLHX26N9mX0yYnfU28TthP5YkU0WnpXYJeUKnXO4DZ XDDzglPwx+MycTPMYNx9SngB83NOywswBZ1PJ86T3wiLGrOIB7RAAhIRE7wv6bhjqPOZ 0xHdVYa5e36AwMLbkxXtspe2H2DeiPAC7pc6QpliZN22FDD0BTFywyba8Gst/z99KDzM nGag== X-Gm-Message-State: AKGB3mLJQRdrK9bxhwS8zRDj3yquIxkeXkAae1+3uuPTkvFgbvDIxVdx jbhpUr/zJqc5yQPm7D23CA8= X-Google-Smtp-Source: ACJfBov7D2ij19dSXtVvrYJvkZ6UW1rh6l0kdg5Ox1q8TUGErmD0XH+FBGhG0kUERtHiK+Nd0VpE1g== X-Received: by 10.223.189.16 with SMTP id j16mr19315529wrh.52.1515677014473; Thu, 11 Jan 2018 05:23:34 -0800 (PST) Received: from localhost.localdomain ([2a02:908:1251:8fc0:2199:5620:a0d:dbf6]) by smtp.gmail.com with ESMTPSA id a126sm357583wma.11.2018.01.11.05.23.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 11 Jan 2018 05:23:33 -0800 (PST) From: "=?UTF-8?q?Christian=20K=C3=B6nig?=" X-Google-Original-From: =?UTF-8?q?Christian=20K=C3=B6nig?= To: bhelgaas@google.com, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Cc: torvalds@linux-foundation.org, aaro.koskinen@iki.fi, andy.shevchenko@gmail.com, boris.ostrovsky@oracle.com, jgross@suse.com, alexander.deucher@amd.com, airlied@linux.ie Subject: [PATCH 1/2] x86/PCI: add kernel option and taint it when we add a 64bit window v2 Date: Thu, 11 Jan 2018 14:23:29 +0100 Message-Id: <20180111132330.2682-1-christian.koenig@amd.com> X-Mailer: git-send-email 2.11.0 MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Only try to enable a 64bit window on AMD CPUs when pci=big_root_window is specified and taint the kernel when we add the window. v2: add documentation for the new option. Signed-off-by: Christian König --- Documentation/admin-guide/kernel-parameters.txt | 4 ++++ arch/x86/include/asm/pci_x86.h | 1 + arch/x86/pci/common.c | 5 +++++ arch/x86/pci/fixup.c | 4 ++++ 4 files changed, 14 insertions(+) diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 6571fbfdb2a1..0cf9e3785840 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -3094,6 +3094,10 @@ pcie_scan_all Scan all possible PCIe devices. Otherwise we only look for one device below a PCIe downstream port. + big_root_window Try to add a big 64bit memory window to the PCIe + root complex on AMD CPUs. This is useful for GFX + hardware which can resize their PCIe BAR to + allow full CPU access to VRAM. pcie_aspm= [PCIE] Forcibly enable or disable PCIe Active State Power Management. diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h index 7a5d6695abd3..eb66fa9cd0fc 100644 --- a/arch/x86/include/asm/pci_x86.h +++ b/arch/x86/include/asm/pci_x86.h @@ -38,6 +38,7 @@ do { \ #define PCI_NOASSIGN_ROMS 0x80000 #define PCI_ROOT_NO_CRS 0x100000 #define PCI_NOASSIGN_BARS 0x200000 +#define PCI_BIG_ROOT_WINDOW 0x400000 extern unsigned int pci_probe; extern unsigned long pirq_table_addr; diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c index 7a5350d08cef..563049c483a1 100644 --- a/arch/x86/pci/common.c +++ b/arch/x86/pci/common.c @@ -594,6 +594,11 @@ char *__init pcibios_setup(char *str) } else if (!strcmp(str, "nocrs")) { pci_probe |= PCI_ROOT_NO_CRS; return NULL; +#ifdef CONFIG_PHYS_ADDR_T_64BIT + } else if (!strcmp(str, "big_root_window")) { + pci_probe |= PCI_BIG_ROOT_WINDOW; + return NULL; +#endif } else if (!strcmp(str, "earlydump")) { pci_early_dump_regs = 1; return NULL; diff --git a/arch/x86/pci/fixup.c b/arch/x86/pci/fixup.c index e663d6bf1328..a91280da2ea1 100644 --- a/arch/x86/pci/fixup.c +++ b/arch/x86/pci/fixup.c @@ -667,6 +667,9 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) struct resource *res, *conflict; struct pci_dev *other; + if (!(pci_probe & PCI_BIG_ROOT_WINDOW)) + return; + /* Check that we are the only device of that type */ other = pci_get_device(dev->vendor, dev->device, NULL); if (other != dev || @@ -715,6 +718,7 @@ static void pci_amd_enable_64bit_bar(struct pci_dev *dev) } dev_info(&dev->dev, "adding root bus resource %pR\n", res); + add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK); base = ((res->start >> 8) & AMD_141b_MMIO_BASE_MMIOBASE_MASK) | AMD_141b_MMIO_BASE_RE_MASK | AMD_141b_MMIO_BASE_WE_MASK;