From patchwork Thu Feb 15 14:39:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mika Westerberg X-Patchwork-Id: 10221427 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 677EB6056E for ; Thu, 15 Feb 2018 14:40:49 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5697729340 for ; Thu, 15 Feb 2018 14:40:49 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 4A57E29383; Thu, 15 Feb 2018 14:40:49 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.9 required=2.0 tests=BAYES_00 autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 0BEA4293AD for ; Thu, 15 Feb 2018 14:40:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1033439AbeBOOkH (ORCPT ); Thu, 15 Feb 2018 09:40:07 -0500 Received: from mga14.intel.com ([192.55.52.115]:54987 "EHLO mga14.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1033431AbeBOOkG (ORCPT ); Thu, 15 Feb 2018 09:40:06 -0500 X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga103.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Feb 2018 06:40:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.46,517,1511856000"; d="scan'208";a="201391327" Received: from black.fi.intel.com ([10.237.72.28]) by orsmga005.jf.intel.com with ESMTP; 15 Feb 2018 06:40:01 -0800 Received: by black.fi.intel.com (Postfix, from userid 1001) id 477F232A; Thu, 15 Feb 2018 16:40:00 +0200 (EET) From: Mika Westerberg To: Bjorn Helgaas , "Rafael J. Wysocki" Cc: Len Brown , Mario.Limonciello@dell.com, Michael Jamet , Yehezkel Bernat , Mika Westerberg , Andy Shevchenko , linux-pci@vger.kernel.org, linux-acpi@vger.kernel.org Subject: [PATCH v2 2/5] PCI: Take bridge window alignment into account when distributing resources Date: Thu, 15 Feb 2018 17:39:56 +0300 Message-Id: <20180215144000.60456-3-mika.westerberg@linux.intel.com> X-Mailer: git-send-email 2.15.1 In-Reply-To: <20180215144000.60456-1-mika.westerberg@linux.intel.com> References: <20180215144000.60456-1-mika.westerberg@linux.intel.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP When connecting a Thunderbolt endpoint which itself has internal PCIe switch (not the integrated one) the way we currently distribute resources does not always work well because devices below non-hotplug bridges might need to have their MMIO resources aligned to something else than 1 MB boundary. As an example connecting a server grade 4-port GbE add in card adds another PCIe switch leading to GbE devices that want to have their MMIO resources aligned to 2 MB boundary instead. Current resource distribution code does not take this alignment into account and might try to add too much resources for the extension hotplug bridges. The resulting bridge window is then too big which makes Linux to re-allocate minimal amount of resources, making future extension impossible. Make this work better by substracting properly aligned non-hotplug downstream bridge window size from the remaining resources. Fixes: 1a5767725cec ("PCI: Distribute available resources to hotplug-capable bridges") Signed-off-by: Mika Westerberg Reviewed-by: Rafael J. Wysocki Cc: stable@vger.kernel.org --- drivers/pci/setup-bus.c | 41 ++++++++++++++++++++++++++++++++++++++++- 1 file changed, 40 insertions(+), 1 deletion(-) diff --git a/drivers/pci/setup-bus.c b/drivers/pci/setup-bus.c index 3cce29a069e6..f1e6172734f0 100644 --- a/drivers/pci/setup-bus.c +++ b/drivers/pci/setup-bus.c @@ -1882,6 +1882,7 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus, resource_size_t available_mmio, resource_size_t available_mmio_pref) { resource_size_t remaining_io, remaining_mmio, remaining_mmio_pref; + resource_size_t io_start, mmio_start, mmio_pref_start; unsigned int normal_bridges = 0, hotplug_bridges = 0; struct resource *io_res, *mmio_res, *mmio_pref_res; struct pci_dev *dev, *bridge = bus->self; @@ -1946,11 +1947,16 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus, remaining_mmio_pref -= resource_size(res); } + io_start = io_res->start; + mmio_start = mmio_res->start; + mmio_pref_start = mmio_pref_res->start; + /* * Go over devices on this bus and distribute the remaining * resource space between hotplug bridges. */ for_each_pci_bridge(dev, bus) { + resource_size_t align; struct pci_bus *b; b = dev->subordinate; @@ -1968,7 +1974,7 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus, available_io, available_mmio, available_mmio_pref); } else if (dev->is_hotplug_bridge) { - resource_size_t align, io, mmio, mmio_pref; + resource_size_t io, mmio, mmio_pref; /* * Distribute available extra resources equally @@ -1981,11 +1987,13 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus, io = div64_ul(available_io, hotplug_bridges); io = min(ALIGN(io, align), remaining_io); remaining_io -= io; + io_start += io; align = pci_resource_alignment(bridge, mmio_res); mmio = div64_ul(available_mmio, hotplug_bridges); mmio = min(ALIGN(mmio, align), remaining_mmio); remaining_mmio -= mmio; + mmio_start += mmio; align = pci_resource_alignment(bridge, mmio_pref_res); mmio_pref = div64_ul(available_mmio_pref, @@ -1993,9 +2001,40 @@ static void pci_bus_distribute_available_resources(struct pci_bus *bus, mmio_pref = min(ALIGN(mmio_pref, align), remaining_mmio_pref); remaining_mmio_pref -= mmio_pref; + mmio_pref_start += mmio_pref; pci_bus_distribute_available_resources(b, add_list, io, mmio, mmio_pref); + } else { + /* + * For normal bridges, track start of the parent + * bridge window to make sure we align the + * remaining space which is distributed to the + * hotplug bridges properly. + */ + resource_size_t aligned; + struct resource *res; + + res = &dev->resource[PCI_BRIDGE_RESOURCES + 0]; + io_start += resource_size(res); + aligned = ALIGN(io_start, + pci_resource_alignment(dev, res)); + if (aligned > io_start) + remaining_io -= aligned - io_start; + + res = &dev->resource[PCI_BRIDGE_RESOURCES + 1]; + mmio_start += resource_size(res); + aligned = ALIGN(mmio_start, + pci_resource_alignment(dev, res)); + if (aligned > mmio_start) + remaining_mmio -= aligned - mmio_start; + + res = &dev->resource[PCI_BRIDGE_RESOURCES + 2]; + mmio_pref_start += resource_size(res); + aligned = ALIGN(mmio_pref_start, + pci_resource_alignment(dev, res)); + if (aligned > mmio_pref_start) + remaining_mmio_pref -= aligned - mmio_pref_start; } } }