From patchwork Sun Mar 18 10:52:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Vasut X-Patchwork-Id: 10291093 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 3373060385 for ; Sun, 18 Mar 2018 10:53:10 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2307A28F95 for ; Sun, 18 Mar 2018 10:53:10 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 17D542900F; Sun, 18 Mar 2018 10:53:10 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5CE0D29011 for ; Sun, 18 Mar 2018 10:53:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754019AbeCRKxI (ORCPT ); Sun, 18 Mar 2018 06:53:08 -0400 Received: from mail-wr0-f193.google.com ([209.85.128.193]:35779 "EHLO mail-wr0-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753775AbeCRKxG (ORCPT ); Sun, 18 Mar 2018 06:53:06 -0400 Received: by mail-wr0-f193.google.com with SMTP id n12so15761737wra.2; Sun, 18 Mar 2018 03:53:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=IFBghJyD4yuCaF5YXa1ZmxfqqGiqqWEjh5DVGSVc+Yo=; b=meywmb74F6z0w6P6QmzIcpc686BCAa2kGUlrVKwAnH8kf/TW5XptizEgDLeEouy2Ew rwGuuhRv737gKcL/FBS0MnmUTpb/jdaT2MsFPlXp4rss6wBXKmbKGAA+/uFtbw9BIafU 0JoIsscQj0PwwFBbx6LsgDxl5ayANAqzM52EAteWCIRzZocCLKz8expFExnU5xRvSOht Lad+rXNwtVUPUKB58qkEJ3FftRSUNfbxMCgXrNusOA0FW1cs0WEFtrrk5YVFRn9D/gTi tHfhed+hK6LBBs4289fHYA5pL17mbN1OnW0IXt/zMJBnytQ7Iy+ULmXf9acipDIGst65 mtaQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=IFBghJyD4yuCaF5YXa1ZmxfqqGiqqWEjh5DVGSVc+Yo=; b=eFVSIRMoeKhDc/1r4V8soKN37u0YNryayCKcdMikR8D6mxZlJwOYv17H+k2/yxyg4B FYK8v12uagKlLc88MM6WOQfYX8dsJ/B3/vOWBFy7kPTUbqpSHEAMAPBbs6l9ee6wKk0K nIc6hmCh8a78cWYJo7pgzAm4SiMCmYYoUgqkHa0Q69CRGEJ4xAj3bqFHSopQUJ50OA3C eLH3JIpCHn+xCGfZZwWCIpt865lZbdI5EbaLs+4BiS5tRZOhevnwXMWx1QibVPO6zqT5 rR2gVVj3YhfJoOKFu2IN+o7wUlkzxyUONWA3aEviPxJcZRyM2Pkwmc8zWMDXOvVqWqKd H6Xw== X-Gm-Message-State: AElRT7HAIPcu8UcwFC+NBzo2rFD+jGqv5kQFUUWrWVquFLHOeWI36699 nGOjtKmuIw9luBE4chzYkvYjRhlQ X-Google-Smtp-Source: AG47ELvuhNhkZEXVudFhHpXcfUpTWJgYbHaVQq71fqbzGfZTdjG2ZcvIbYDS+dQb9tG7hFwf06wzWQ== X-Received: by 10.223.182.2 with SMTP id f2mr5936999wre.117.1521370384472; Sun, 18 Mar 2018 03:53:04 -0700 (PDT) Received: from kurokawa.lan (ip-86-49-107-50.net.upcbroadband.cz. [86.49.107.50]) by smtp.gmail.com with ESMTPSA id k20sm5207746wre.67.2018.03.18.03.53.03 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 18 Mar 2018 03:53:03 -0700 (PDT) From: Marek Vasut X-Google-Original-From: Marek Vasut To: linux-pci@vger.kernel.org Cc: Marek Vasut , Geert Uytterhoeven , Phil Edworthy , Simon Horman , Wolfram Sang , linux-renesas-soc@vger.kernel.org Subject: [PATCH 2/2] PCI: rcar: Clean up the macros Date: Sun, 18 Mar 2018 11:52:53 +0100 Message-Id: <20180318105253.30532-2-marek.vasut+renesas@gmail.com> X-Mailer: git-send-email 2.16.2 In-Reply-To: <20180318105253.30532-1-marek.vasut+renesas@gmail.com> References: <20180318105253.30532-1-marek.vasut+renesas@gmail.com> Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This patch replaces the (1 << n) with BIT(n) and cleans up whitespace, no functional change. Signed-off-by: Marek Vasut Cc: Geert Uytterhoeven Cc: Phil Edworthy Cc: Simon Horman Cc: Wolfram Sang Cc: linux-renesas-soc@vger.kernel.org Reviewed-by: Simon Horman --- V2: Reword the commit message --- drivers/pci/host/pcie-rcar.c | 52 ++++++++++++++++++++++---------------------- 1 file changed, 26 insertions(+), 26 deletions(-) diff --git a/drivers/pci/host/pcie-rcar.c b/drivers/pci/host/pcie-rcar.c index 099998f1923a..35815d516125 100644 --- a/drivers/pci/host/pcie-rcar.c +++ b/drivers/pci/host/pcie-rcar.c @@ -30,9 +30,9 @@ #define PCIECAR 0x000010 #define PCIECCTLR 0x000018 -#define CONFIG_SEND_ENABLE (1 << 31) +#define CONFIG_SEND_ENABLE BIT(31) #define TYPE0 (0 << 8) -#define TYPE1 (1 << 8) +#define TYPE1 BIT(8) #define PCIECDR 0x000020 #define PCIEMSR 0x000028 #define PCIEINTXR 0x000400 @@ -44,7 +44,7 @@ #define PCIETSTR 0x02004 #define DATA_LINK_ACTIVE 1 #define PCIEERRFR 0x02020 -#define UNSUPPORTED_REQUEST (1 << 4) +#define UNSUPPORTED_REQUEST BIT(4) #define PCIEMSIFR 0x02044 #define PCIEMSIALR 0x02048 #define MSIFE 1 @@ -57,17 +57,17 @@ /* local address reg & mask */ #define PCIELAR(x) (0x02200 + ((x) * 0x20)) #define PCIELAMR(x) (0x02208 + ((x) * 0x20)) -#define LAM_PREFETCH (1 << 3) -#define LAM_64BIT (1 << 2) -#define LAR_ENABLE (1 << 1) +#define LAM_PREFETCH BIT(3) +#define LAM_64BIT BIT(2) +#define LAR_ENABLE BIT(1) /* PCIe address reg & mask */ #define PCIEPALR(x) (0x03400 + ((x) * 0x20)) #define PCIEPAUR(x) (0x03404 + ((x) * 0x20)) #define PCIEPAMR(x) (0x03408 + ((x) * 0x20)) #define PCIEPTCTLR(x) (0x0340c + ((x) * 0x20)) -#define PAR_ENABLE (1 << 31) -#define IO_SPACE (1 << 8) +#define PAR_ENABLE BIT(31) +#define IO_SPACE BIT(8) /* Configuration */ #define PCICONF(x) (0x010000 + ((x) * 0x4)) @@ -79,23 +79,23 @@ #define IDSETR1 0x011004 #define TLCTLR 0x011048 #define MACSR 0x011054 -#define SPCHGFIN (1 << 4) -#define SPCHGFAIL (1 << 6) -#define SPCHGSUC (1 << 7) +#define SPCHGFIN BIT(4) +#define SPCHGFAIL BIT(6) +#define SPCHGSUC BIT(7) #define LINK_SPEED (0xf << 16) #define LINK_SPEED_2_5GTS (1 << 16) #define LINK_SPEED_5_0GTS (2 << 16) #define MACCTLR 0x011058 -#define SPEED_CHANGE (1 << 24) -#define SCRAMBLE_DISABLE (1 << 27) +#define SPEED_CHANGE BIT(24) +#define SCRAMBLE_DISABLE BIT(27) #define MACS2R 0x011078 #define MACCGSPSETR 0x011084 -#define SPCNGRSN (1 << 31) +#define SPCNGRSN BIT(31) /* R-Car H1 PHY */ #define H1_PCIEPHYADRR 0x04000c -#define WRITE_CMD (1 << 16) -#define PHY_ACK (1 << 24) +#define WRITE_CMD BIT(16) +#define PHY_ACK BIT(24) #define RATE_POS 12 #define LANE_POS 8 #define ADR_POS 0 @@ -107,19 +107,19 @@ #define GEN2_PCIEPHYDATA 0x784 #define GEN2_PCIEPHYCTRL 0x78c -#define INT_PCI_MSI_NR 32 +#define INT_PCI_MSI_NR 32 -#define RCONF(x) (PCICONF(0)+(x)) -#define RPMCAP(x) (PMCAP(0)+(x)) -#define REXPCAP(x) (EXPCAP(0)+(x)) -#define RVCCAP(x) (VCCAP(0)+(x)) +#define RCONF(x) (PCICONF(0) + (x)) +#define RPMCAP(x) (PMCAP(0) + (x)) +#define REXPCAP(x) (EXPCAP(0) + (x)) +#define RVCCAP(x) (VCCAP(0) + (x)) -#define PCIE_CONF_BUS(b) (((b) & 0xff) << 24) -#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 19) -#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 16) +#define PCIE_CONF_BUS(b) (((b) & 0xff) << 24) +#define PCIE_CONF_DEV(d) (((d) & 0x1f) << 19) +#define PCIE_CONF_FUNC(f) (((f) & 0x7) << 16) -#define RCAR_PCI_MAX_RESOURCES 4 -#define MAX_NR_INBOUND_MAPS 6 +#define RCAR_PCI_MAX_RESOURCES 4 +#define MAX_NR_INBOUND_MAPS 6 struct rcar_msi { DECLARE_BITMAP(used, INT_PCI_MSI_NR);