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Wed, 18 Jul 2018 19:44:50 +0000 From: Trent Piepho To: linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Trent Piepho , Shawn Guo , Sascha Hauer , Fabio Estevam , Richard Zhu , Lucas Stach Subject: [PATCH 1/2] ARM: dts: imx7d: Add node for PCIe PHY Date: Wed, 18 Jul 2018 12:44:23 -0700 Message-Id: <20180718194424.8844-2-tpiepho@impinj.com> X-Mailer: git-send-email 2.14.4 In-Reply-To: <20180718194424.8844-1-tpiepho@impinj.com> References: <20180718194424.8844-1-tpiepho@impinj.com> MIME-Version: 1.0 X-Originating-IP: [216.207.205.253] X-ClientProxiedBy: MWHPR14CA0014.namprd14.prod.outlook.com (2603:10b6:300:ae::24) To MWHPR0601MB3708.namprd06.prod.outlook.com (2603:10b6:301:7c::38) X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 8ee89838-4422-4734-44e9-08d5ece6ed2f X-Microsoft-Antispam: BCL:0; PCL:0; RULEID:(7020095)(4652040)(8989117)(5600067)(711020)(4534165)(4627221)(201703031133081)(201702281549075)(8990107)(2017052603328)(7153060)(7193020); SRVR:MWHPR0601MB3708; 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This adds the PHY as a new node. The PCI-e controller node gains a phandle property that points to it. There is no driver for the PHY at this point and all the existing code that relates to the PHY is part of the PCI-e controller driver (and does not need register access, yet). Cc: Shawn Guo Cc: Sascha Hauer Cc: Fabio Estevam Cc: Richard Zhu Cc: Lucas Stach Signed-off-by: Trent Piepho --- Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 11 +++++++++++ arch/arm/boot/dts/imx7d.dtsi | 9 +++++++++ 2 files changed, 20 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt index cb33421184a0..c7aeda6878ff 100644 --- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt +++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt @@ -50,6 +50,7 @@ Additional required properties for imx7d-pcie: - reset-names: Must contain the following entires: - "pciephy" - "apps" +- fsl,pcie-phy: A phandle to an fsl,imx-pcie-phy node. Example: @@ -76,3 +77,13 @@ Example: clocks = <&clks 144>, <&clks 206>, <&clks 189>; clock-names = "pcie", "pcie_bus", "pcie_phy"; }; + +* Freescale i.MX7d PCIe PHY + +This is the PHY associated with the IMX7d PCIe controller. It's used by the +PCI-e controller via the fsl,pcie-phy phandle. + +Required properties: +- compatible: + - "fsl,imx-pcie-phy" +- reg: base address and length of the PCIe PHY controller diff --git a/arch/arm/boot/dts/imx7d.dtsi b/arch/arm/boot/dts/imx7d.dtsi index 200714e3feea..31f5c8576251 100644 --- a/arch/arm/boot/dts/imx7d.dtsi +++ b/arch/arm/boot/dts/imx7d.dtsi @@ -94,6 +94,14 @@ }; }; +&aips2 { + pcie_phy: pcie-phy@306d0000 { + compatible = "fsl,imx-pcie-phy"; + reg = <0x306d0000 0x10000>; + status = "disabled"; + }; +}; + &aips3 { usbotg2: usb@30b20000 { compatible = "fsl,imx7d-usb", "fsl,imx27-usb"; @@ -167,6 +175,7 @@ <&src IMX7_RESET_PCIE_CTRL_APPS_EN>; reset-names = "pciephy", "apps"; status = "disabled"; + fsl,pcie-phy = <&pcie_phy>; }; };