================>
From: Ingo Molnar <mingo@kernel.org>
Date: Mon, 3 Dec 2018 09:42:40 +0100
Subject: [PATCH] x86/pci: Clean up the asm/pci_x86.h header a bit

- The addition of PCI_CHECK_ENABLE_AMD_MMCONF broke the tabulation of the
  enumeration - fix the tabulation and also extend it with zeroes to make
  it clearer how the bits relate, and to make it easier to check that
  there's no accidental overlap.

- Remove unnecessary and out of date comments referring to file names that
  do not exist with that name anymore.

- Fix non-standard comment lines.

- Add 'extern' to global scope variables/functions that don't have it.

- Fix typo.

- Tabulate 'struct pci_mmcfg_region', similarly to the other structure
  definitions in this header.

- Move the x86_default_pci_* definitions closer to their usage site
  in arch/x86/kernel/x86_init.c, they are not used anywhere else,
  so it's unnecessary to include it in 30+ .c files.

No change to functionality intended.

Signed-off-by: Ingo Molnar <mingo@kernel.org>
---
 arch/x86/include/asm/pci_x86.h | 101 +++++++++++++++--------------------------
 arch/x86/kernel/x86_init.c     |  14 ++++++
 2 files changed, 51 insertions(+), 64 deletions(-)

diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index 3f8d9c75b9ee..3448f24282c7 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -7,26 +7,26 @@
 
 #include <linux/ioport.h>
 
-#define PCI_PROBE_BIOS		0x0001
-#define PCI_PROBE_CONF1		0x0002
-#define PCI_PROBE_CONF2		0x0004
-#define PCI_PROBE_MMCONF	0x0008
-#define PCI_PROBE_MASK		0x000f
-#define PCI_PROBE_NOEARLY	0x0010
-
-#define PCI_NO_CHECKS		0x0400
-#define PCI_USE_PIRQ_MASK	0x0800
-#define PCI_ASSIGN_ROMS		0x1000
-#define PCI_BIOS_IRQ_SCAN	0x2000
-#define PCI_ASSIGN_ALL_BUSSES	0x4000
-#define PCI_CAN_SKIP_ISA_ALIGN	0x8000
-#define PCI_USE__CRS		0x10000
-#define PCI_CHECK_ENABLE_AMD_MMCONF	0x20000
-#define PCI_HAS_IO_ECS		0x40000
-#define PCI_NOASSIGN_ROMS	0x80000
-#define PCI_ROOT_NO_CRS		0x100000
-#define PCI_NOASSIGN_BARS	0x200000
-#define PCI_BIG_ROOT_WINDOW	0x400000
+#define PCI_PROBE_BIOS			0x000001
+#define PCI_PROBE_CONF1			0x000002
+#define PCI_PROBE_CONF2			0x000004
+#define PCI_PROBE_MMCONF		0x000008
+#define PCI_PROBE_MASK			0x00000f
+#define PCI_PROBE_NOEARLY		0x000010
+
+#define PCI_NO_CHECKS			0x000400
+#define PCI_USE_PIRQ_MASK		0x000800
+#define PCI_ASSIGN_ROMS			0x001000
+#define PCI_BIOS_IRQ_SCAN		0x002000
+#define PCI_ASSIGN_ALL_BUSSES		0x004000
+#define PCI_CAN_SKIP_ISA_ALIGN		0x008000
+#define PCI_USE__CRS			0x010000
+#define PCI_CHECK_ENABLE_AMD_MMCONF	0x020000
+#define PCI_HAS_IO_ECS			0x040000
+#define PCI_NOASSIGN_ROMS		0x080000
+#define PCI_ROOT_NO_CRS			0x100000
+#define PCI_NOASSIGN_BARS		0x200000
+#define PCI_BIG_ROOT_WINDOW		0x400000
 
 extern unsigned int pci_probe;
 extern unsigned long pirq_table_addr;
@@ -38,28 +38,19 @@ enum pci_bf_sort_state {
 	pci_dmi_bf,
 };
 
-/* pci-i386.c */
-
-void pcibios_resource_survey(void);
-void pcibios_set_cache_line_size(void);
-
-/* pci-pc.c */
-
+extern void pcibios_resource_survey(void);
+extern void pcibios_set_cache_line_size(void);
 extern int pcibios_last_bus;
 extern struct pci_ops pci_root_ops;
-
-void pcibios_scan_specific_bus(int busn);
-
-/* pci-irq.c */
+extern void pcibios_scan_specific_bus(int busn);
 
 struct irq_info {
 	u8 bus, devfn;			/* Bus, device and function */
 	struct {
-		u8 link;		/* IRQ line ID, chipset dependent,
-					   0 = not routed */
+		u8 link;		/* IRQ line ID, chipset dependent, 0 = not routed */
 		u16 bitmap;		/* Available IRQs */
-	} __attribute__((packed)) irq[4];
-	u8 slot;			/* Slot number, 0=onboard */
+	} __packed irq[4];
+	u8 slot;			/* Slot number, 0 = onboard */
 	u8 rfu;
 } __attribute__((packed));
 
@@ -68,10 +59,8 @@ struct irq_routing_table {
 	u16 version;			/* PIRQ_VERSION */
 	u16 size;			/* Table size in bytes */
 	u8 rtr_bus, rtr_devfn;		/* Where the interrupt router lies */
-	u16 exclusive_irqs;		/* IRQs devoted exclusively to
-					   PCI usage */
-	u16 rtr_vendor, rtr_device;	/* Vendor and device ID of
-					   interrupt router */
+	u16 exclusive_irqs;		/* IRQs devoted exclusively to PCI usage */
+	u16 rtr_vendor, rtr_device;	/* Vendor and device ID of interrupt router */
 	u32 miniport_data;		/* Crap */
 	u8 rfu[11];
 	u8 checksum;			/* Modulo 256 checksum must give 0 */
@@ -108,27 +97,25 @@ extern void pci_pcbios_init(void);
 extern void __init dmi_check_pciprobe(void);
 extern void __init dmi_check_skip_isa_align(void);
 
-/* some common used subsys_initcalls */
+/* some commonly used subsys_initcalls */
 extern int __init pci_acpi_init(void);
 extern void __init pcibios_irq_init(void);
 extern int __init pcibios_init(void);
 extern int pci_legacy_init(void);
 extern void pcibios_fixup_irqs(void);
 
-/* pci-mmconfig.c */
-
 /* "PCI MMCONFIG %04x [bus %02x-%02x]" */
 #define PCI_MMCFG_RESOURCE_NAME_LEN (22 + 4 + 2 + 2)
 
 struct pci_mmcfg_region {
-	struct list_head list;
-	struct resource res;
-	u64 address;
-	char __iomem *virt;
-	u16 segment;
-	u8 start_bus;
-	u8 end_bus;
-	char name[PCI_MMCFG_RESOURCE_NAME_LEN];
+	struct list_head	list;
+	struct resource		res;
+	u64			address;
+	char __iomem		*virt;
+	u16			segment;
+	u8			start_bus;
+	u8			end_bus;
+	char			name[PCI_MMCFG_RESOURCE_NAME_LEN];
 };
 
 extern int __init pci_mmcfg_arch_init(void);
@@ -188,17 +175,3 @@ static inline void mmio_config_writel(void __iomem *pos, u32 val)
 {
 	asm volatile("movl %%eax,(%1)" : : "a" (val), "r" (pos) : "memory");
 }
-
-#ifdef CONFIG_PCI
-# ifdef CONFIG_ACPI
-#  define x86_default_pci_init		pci_acpi_init
-# else
-#  define x86_default_pci_init		pci_legacy_init
-# endif
-# define x86_default_pci_init_irq	pcibios_irq_init
-# define x86_default_pci_fixup_irqs	pcibios_fixup_irqs
-#else
-# define x86_default_pci_init		NULL
-# define x86_default_pci_init_irq	NULL
-# define x86_default_pci_fixup_irqs	NULL
-#endif
diff --git a/arch/x86/kernel/x86_init.c b/arch/x86/kernel/x86_init.c
index 50a2b492fdd6..95f64345c416 100644
--- a/arch/x86/kernel/x86_init.c
+++ b/arch/x86/kernel/x86_init.c
@@ -32,6 +32,20 @@ static void iommu_shutdown_noop(void) { }
 static bool __init bool_x86_init_noop(void) { return false; }
 static void x86_op_int_noop(int cpu) { }
 
+#ifdef CONFIG_PCI
+# ifdef CONFIG_ACPI
+#  define x86_default_pci_init		pci_acpi_init
+# else
+#  define x86_default_pci_init		pci_legacy_init
+# endif
+# define x86_default_pci_init_irq	pcibios_irq_init
+# define x86_default_pci_fixup_irqs	pcibios_fixup_irqs
+#else
+# define x86_default_pci_init		NULL
+# define x86_default_pci_init_irq	NULL
+# define x86_default_pci_fixup_irqs	NULL
+#endif
+
 /*
  * The platform setup functions are preset with the default functions
  * for standard PC hardware.
