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[24.22.235.96]) by smtp.gmail.com with ESMTPSA id d18sm13837878pfj.47.2018.12.16.15.09.39 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 16 Dec 2018 15:09:40 -0800 (PST) From: Andrey Smirnov To: Lorenzo Pieralisi Cc: Andrey Smirnov , Bjorn Helgaas , Fabio Estevam , Chris Healy , Lucas Stach , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org Subject: [PATCH 2/3] PCI: imx6: Invert checks in imx6_pcie_reset_phy() and imx6_setup_phy_mpll() Date: Sun, 16 Dec 2018 15:09:15 -0800 Message-Id: <20181216230916.22982-3-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181216230916.22982-1-andrew.smirnov@gmail.com> References: <20181216230916.22982-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP In order to avoid having potentially ever growing list of variants that don't support methods implemented in imx6_pcie_reset_phy() and imx6_setup_phy_mpll(), change logical checks in the to check for SoC's that _do_ support what they implement. While at it, share the code via a small helper function. Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Suggested-by: Bjorn Helgaas Signed-off-by: Andrey Smirnov --- drivers/pci/controller/dwc/pci-imx6.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index 4b7f638b8aff..59658577e81d 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -256,12 +256,18 @@ static int pcie_phy_write(struct imx6_pcie *imx6_pcie, int addr, int data) return 0; } +static bool imx6_pcie_has_imx6_phy(struct imx6_pcie *imx6_pcie) +{ + return imx6_pcie->variant == IMX6Q || + imx6_pcie->variant == IMX6SX || + imx6_pcie->variant == IMX6QP; +} + static void imx6_pcie_reset_phy(struct imx6_pcie *imx6_pcie) { u32 tmp; - if (imx6_pcie->variant == IMX7D || - imx6_pcie->variant == IMX8MQ) + if (!imx6_pcie_has_imx6_phy(imx6_pcie)) return; pcie_phy_read(imx6_pcie, PHY_RX_OVRD_IN_LO, &tmp); @@ -637,8 +643,7 @@ static int imx6_setup_phy_mpll(struct imx6_pcie *imx6_pcie) int mult, div; u32 val; - if (imx6_pcie->variant == IMX7D || - imx6_pcie->variant == IMX8MQ) + if (!imx6_pcie_has_imx6_phy(imx6_pcie)) return 0; switch (phy_rate) {