From patchwork Fri Dec 21 07:27:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrey Smirnov X-Patchwork-Id: 10740029 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B209B746 for ; Fri, 21 Dec 2018 07:30:02 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 998E828429 for ; Fri, 21 Dec 2018 07:30:02 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 8CA9028433; Fri, 21 Dec 2018 07:30:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FROM,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C3112842A for ; Fri, 21 Dec 2018 07:30:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2387731AbeLUH14 (ORCPT ); Fri, 21 Dec 2018 02:27:56 -0500 Received: from mail-pl1-f193.google.com ([209.85.214.193]:41636 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387698AbeLUH14 (ORCPT ); Fri, 21 Dec 2018 02:27:56 -0500 Received: by mail-pl1-f193.google.com with SMTP id u6so2104774plm.8; Thu, 20 Dec 2018 23:27:55 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HjLeQTWp5O7b44WjnLWHOp2yQfeZyWOrOmzsZ5Uzh4Y=; b=KTqzBDIwbk8ZHx2tP5xo+RJ6k0Rtiom1wUPdSfWrQLfmWAWIcDeb9pZBilfkdAy0L2 16e1Y+iBEIA2ewRbwsdjFjZj2+cvI0wWoN1bCikxwzltvLQVp0WzC+ehLcBuf1qQqpIK HKwGJmRDYq8XLNMn76kI2T7ZeB174SgVkSwl0FiwW7Wnt/HKaEZ/qL1HcOQ2VtlAzwAR JvyZdIN5aklji9Ik6z01yKMCx0d22urVSNlTu9nIJMZ3rTgYFacEs7JiEqfbEMHPYxMr 09UD9dXs2keLcKMbiFFjm22Hle8Px1eR5itAbRLp5WIhADejfBAm94pbaChoH+D3M3fJ 1u9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HjLeQTWp5O7b44WjnLWHOp2yQfeZyWOrOmzsZ5Uzh4Y=; b=OJRTTHy645Yyisvzn78HW29sPGZRXJvVpI2nrJAUN5btnAwDMbCJWLApvbGiiSFl0O gyQgVysFxTQjSDvnkQ0n343E4LzWSO34eWH6MKyL6cI4iL8mBn2vZjxjblXYlrRRuT6h EfVGw7Rps1/X0ZRZ6Thf86AM5kxWWMXdFx9D4+QWT9NSwllaSJqC9LhDLo7B+6hFBxkF PXSt5EOO9vyqc8BYYjE7A1SF6pgmKftok245dDrVappISnkEmU7iyRx7P7QjRL1/Kg2U IPY4x/9MlRmjnGqPHBeuxCN3dTkPv8K5Tq6WVsdi1AiXH78j2E2AiyoWOSaMKjaMvxsz gpNw== X-Gm-Message-State: AJcUukeDQfgV894tJOnimCftECO9X07Ha3Vh0kwOemWt68jB2vzu/cuR ZYssStT5a8p+h2X7q4RkxnBEIwpE X-Google-Smtp-Source: ALg8bN7D4v9/OXU3SC/7OBc9bHk3mU9wKahu3Y3BLBBhoK5P7vGe6/FObat6UBE2nlztKwrrrd7oAA== X-Received: by 2002:a17:902:f64:: with SMTP id 91mr1437737ply.132.1545377274451; Thu, 20 Dec 2018 23:27:54 -0800 (PST) Received: from squirtle.lan (c-24-22-235-96.hsd1.wa.comcast.net. [24.22.235.96]) by smtp.gmail.com with ESMTPSA id t90sm44971921pfj.23.2018.12.20.23.27.52 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 20 Dec 2018 23:27:53 -0800 (PST) From: Andrey Smirnov To: linux-pci@vger.kernel.org Cc: Andrey Smirnov , Lorenzo Pieralisi , Bjorn Helgaas , Fabio Estevam , Chris Healy , Lucas Stach , Leonard Crestez , "A.s. Dong" , Richard Zhu , linux-imx@nxp.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 08/21] PCI: designware: Share code for dw_pcie_rd/wr_other_conf() Date: Thu, 20 Dec 2018 23:27:03 -0800 Message-Id: <20181221072716.29017-9-andrew.smirnov@gmail.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181221072716.29017-1-andrew.smirnov@gmail.com> References: <20181221072716.29017-1-andrew.smirnov@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Default implementation of pcie_rd_other_conf() and dw_pcie_wd_other_conf() share more than 80% of their code. Move shared code into a dedicated subroutine and convert pcie_rd_other_conf() and dw_pcie_wd_other_conf() to use it. No functional change intended. Cc: Lorenzo Pieralisi Cc: Bjorn Helgaas Cc: Fabio Estevam Cc: Chris Healy Cc: Lucas Stach Cc: Leonard Crestez Cc: "A.s. Dong" Cc: Richard Zhu Cc: linux-imx@nxp.com Cc: linux-arm-kernel@lists.infradead.org Cc: linux-kernel@vger.kernel.org Cc: linux-pci@vger.kernel.org Signed-off-by: Andrey Smirnov Acked-by: Gustavo Pimentel --- .../pci/controller/dwc/pcie-designware-host.c | 61 +++++++------------ 1 file changed, 23 insertions(+), 38 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index 721d60a5d9e4..8f957cd6901b 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -512,8 +512,9 @@ int dw_pcie_host_init(struct pcie_port *pp) return ret; } -static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, - u32 devfn, int where, int size, u32 *val) +static int dw_pcie_access_other_conf(struct pcie_port *pp, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val, + bool write) { int ret, type; u32 busdev, cfg_size; @@ -521,9 +522,6 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, void __iomem *va_cfg_base; struct dw_pcie *pci = to_dw_pcie_from_pp(pp); - if (pp->ops->rd_other_conf) - return pp->ops->rd_other_conf(pp, bus, devfn, where, size, val); - busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | PCIE_ATU_FUNC(PCI_FUNC(devfn)); @@ -542,7 +540,11 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, type, cpu_addr, busdev, cfg_size); - ret = dw_pcie_read(va_cfg_base + where, size, val); + if (write) + ret = dw_pcie_write(va_cfg_base + where, size, *val); + else + ret = dw_pcie_read(va_cfg_base + where, size, val); + if (pci->num_viewport <= 2) dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, PCIE_ATU_TYPE_IO, pp->io_base, @@ -551,43 +553,26 @@ static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, return ret; } +static int dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, + u32 devfn, int where, int size, u32 *val) +{ + if (pp->ops->rd_other_conf) + return pp->ops->rd_other_conf(pp, bus, devfn, where, + size, val); + + return dw_pcie_access_other_conf(pp, bus, devfn, where, size, val, + false); +} + static int dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 val) { - int ret, type; - u32 busdev, cfg_size; - u64 cpu_addr; - void __iomem *va_cfg_base; - struct dw_pcie *pci = to_dw_pcie_from_pp(pp); - if (pp->ops->wr_other_conf) - return pp->ops->wr_other_conf(pp, bus, devfn, where, size, val); - - busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | - PCIE_ATU_FUNC(PCI_FUNC(devfn)); + return pp->ops->wr_other_conf(pp, bus, devfn, where, + size, val); - if (bus->parent->number == pp->root_bus_nr) { - type = PCIE_ATU_TYPE_CFG0; - cpu_addr = pp->cfg0_base; - cfg_size = pp->cfg0_size; - va_cfg_base = pp->va_cfg0_base; - } else { - type = PCIE_ATU_TYPE_CFG1; - cpu_addr = pp->cfg1_base; - cfg_size = pp->cfg1_size; - va_cfg_base = pp->va_cfg1_base; - } - - dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, - type, cpu_addr, - busdev, cfg_size); - ret = dw_pcie_write(va_cfg_base + where, size, val); - if (pci->num_viewport <= 2) - dw_pcie_prog_outbound_atu(pci, PCIE_ATU_REGION_INDEX1, - PCIE_ATU_TYPE_IO, pp->io_base, - pp->io_bus_addr, pp->io_size); - - return ret; + return dw_pcie_access_other_conf(pp, bus, devfn, where, size, &val, + true); } static int dw_pcie_valid_device(struct pcie_port *pp, struct pci_bus *bus,