From patchwork Tue Jan 8 16:24:35 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10752359 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 982AE746 for ; Tue, 8 Jan 2019 16:25:37 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 874841FFCA for ; Tue, 8 Jan 2019 16:25:37 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7ACD02228E; Tue, 8 Jan 2019 16:25:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2C5D11FFCA for ; Tue, 8 Jan 2019 16:25:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729169AbfAHQZa (ORCPT ); Tue, 8 Jan 2019 11:25:30 -0500 Received: from mail.bootlin.com ([62.4.15.54]:44901 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729334AbfAHQYu (ORCPT ); Tue, 8 Jan 2019 11:24:50 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id A197920A2A; Tue, 8 Jan 2019 17:24:48 +0100 (CET) Received: from localhost.localdomain (aaubervilliers-681-1-45-241.w90-88.abo.wanadoo.fr [90.88.163.241]) by mail.bootlin.com (Postfix) with ESMTPSA id 4218F207A3; Tue, 8 Jan 2019 17:24:48 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: , Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, , , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v3 10/15] dt-bindings: PCI: aardvark: Describe the PCIe endpoint card reset pins Date: Tue, 8 Jan 2019 17:24:35 +0100 Message-Id: <20190108162441.5278-11-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP A line might be used by the PCIe IP to reset the endpoint card upon: - platform reset, - hot reset, - link failure. Describe the properties needed in this case (optional). Signed-off-by: Miquel Raynal Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/aardvark-pci.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/aardvark-pci.txt b/Documentation/devicetree/bindings/pci/aardvark-pci.txt index a440f182ccf8..8b7f048705ec 100644 --- a/Documentation/devicetree/bindings/pci/aardvark-pci.txt +++ b/Documentation/devicetree/bindings/pci/aardvark-pci.txt @@ -24,6 +24,9 @@ contain the following properties: The following are optional properties: - phys: the PCIe PHY handle + - pinctrl-names: must be "default". + - pinctrl-0: pin control group to be used to mux the PCIe endpoint card + reset line so that it will be automatically driven by the PCIe IP. In addition, the Device Tree describing an Aardvark PCIe controller must include a sub-node that describes the legacy interrupt controller @@ -55,6 +58,8 @@ Example: <0 0 0 3 &pcie_intc 2>, <0 0 0 4 &pcie_intc 3>; phys = <&comphy1 0>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_card_reset_pins &pcie_clkreq_pins>; pcie_intc: interrupt-controller { interrupt-controller; #interrupt-cells = <1>;