From patchwork Tue Jan 8 16:24:32 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Miquel Raynal X-Patchwork-Id: 10752367 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 02E3A746 for ; Tue, 8 Jan 2019 16:25:52 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id E32651FFCA for ; Tue, 8 Jan 2019 16:25:51 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id D396E23B23; Tue, 8 Jan 2019 16:25:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 674F71FFCA for ; Tue, 8 Jan 2019 16:25:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729555AbfAHQZo (ORCPT ); Tue, 8 Jan 2019 11:25:44 -0500 Received: from mail.bootlin.com ([62.4.15.54]:44893 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729288AbfAHQYu (ORCPT ); Tue, 8 Jan 2019 11:24:50 -0500 Received: by mail.bootlin.com (Postfix, from userid 110) id 8E83B20A16; Tue, 8 Jan 2019 17:24:47 +0100 (CET) Received: from localhost.localdomain (aaubervilliers-681-1-45-241.w90-88.abo.wanadoo.fr [90.88.163.241]) by mail.bootlin.com (Postfix) with ESMTPSA id 2E93E209C2; Tue, 8 Jan 2019 17:24:47 +0100 (CET) From: Miquel Raynal To: Gregory Clement , Jason Cooper , Andrew Lunn , Sebastian Hesselbarth , Thomas Petazzoni , Bjorn Helgaas Cc: , Rob Herring , Mark Rutland , Lorenzo Pieralisi , linux-pci@vger.kernel.org, , , Antoine Tenart , Maxime Chevallier , Nadav Haklai , Miquel Raynal Subject: [PATCH v3 07/15] PCI: aardvark: Add suspend to RAM support Date: Tue, 8 Jan 2019 17:24:32 +0100 Message-Id: <20190108162441.5278-8-miquel.raynal@bootlin.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190108162441.5278-1-miquel.raynal@bootlin.com> References: <20190108162441.5278-1-miquel.raynal@bootlin.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add suspend and resume callbacks. The priority of these are "_noirq()", to workaround early access to the registers done by the PCI core through the ->read()/->write() callbacks at resume time. Signed-off-by: Miquel Raynal --- drivers/pci/controller/pci-aardvark.c | 45 ++++++++++++++++++++++++++- 1 file changed, 44 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 3fb14e37eb59..999bbe27761a 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -1028,7 +1028,7 @@ static int advk_pcie_setup_clk(struct advk_pcie *pcie) return ret; } -static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie) +static void advk_pcie_disable_phy(struct advk_pcie *pcie) { phy_power_off(pcie->phy); phy_exit(pcie->phy); @@ -1119,6 +1119,47 @@ static int advk_pcie_setup_reset_gpio(struct advk_pcie *pcie) return 0; } +static int __maybe_unused advk_pcie_suspend(struct device *dev) +{ + struct advk_pcie *pcie = dev_get_drvdata(dev); + + advk_pcie_disable_phy(pcie); + + clk_disable_unprepare(pcie->clk); + + return 0; +} + +static int __maybe_unused advk_pcie_resume(struct device *dev) +{ + struct advk_pcie *pcie = dev_get_drvdata(dev); + int ret; + + ret = clk_prepare_enable(pcie->clk); + if (ret) + return ret; + + ret = advk_pcie_enable_phy(pcie); + if (ret) + return ret; + + advk_pcie_setup_hw(pcie); + + advk_sw_pci_bridge_init(pcie); + + return 0; +} + +/* + * The PCI core will try to reconfigure the bus quite early in the resume path. + * We must use the _noirq() alternatives to ensure the controller is ready when + * the core uses the ->read()/->write() callbacks. + */ +static const struct dev_pm_ops advk_pcie_dev_pm_ops = { + SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(advk_pcie_suspend, + advk_pcie_resume) +}; + static int advk_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -1133,6 +1174,7 @@ static int advk_pcie_probe(struct platform_device *pdev) pcie = pci_host_bridge_priv(bridge); pcie->pdev = pdev; + platform_set_drvdata(pdev, pcie); res = platform_get_resource(pdev, IORESOURCE_MEM, 0); pcie->base = devm_ioremap_resource(dev, res); @@ -1210,6 +1252,7 @@ static struct platform_driver advk_pcie_driver = { .driver = { .name = "advk-pcie", .of_match_table = advk_pcie_of_match_table, + .pm = &advk_pcie_dev_pm_ops, /* Driver unloading/unbinding currently not supported */ .suppress_bind_attrs = true, },