Message ID | 20190322023844.18574-6-marek.vasut@gmail.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | [V2,1/6] PCI: rcar: Clean up remaining macros defining bits | expand |
> - rcar_pci_write_reg(pcie, 0, PCIEMSIAUR); > + rcar_pci_write_reg(pcie, base >> 32, PCIEMSIAUR); Seeing the in-depth discussion between you and Geert, I'll leave this to you guys :)
On 3/22/19 9:34 AM, Wolfram Sang wrote: > >> - rcar_pci_write_reg(pcie, 0, PCIEMSIAUR); >> + rcar_pci_write_reg(pcie, base >> 32, PCIEMSIAUR); > > Seeing the in-depth discussion between you and Geert, I'll leave this to > you guys :) I think this fix is clear, the discussion is now rather about whether we should allocate the reserved page with GFP_DMA32 and keep it in 32bit address range or not. I'll reword the commit message though.
diff --git a/drivers/pci/controller/pcie-rcar.c b/drivers/pci/controller/pcie-rcar.c index 989b7b73ed61..75ac83f21035 100644 --- a/drivers/pci/controller/pcie-rcar.c +++ b/drivers/pci/controller/pcie-rcar.c @@ -889,7 +889,7 @@ static int rcar_pcie_enable_msi(struct rcar_pcie *pcie) { struct device *dev = pcie->dev; struct rcar_msi *msi = &pcie->msi; - unsigned long base; + phys_addr_t base; int err, i; mutex_init(&msi->lock); @@ -931,7 +931,7 @@ static int rcar_pcie_enable_msi(struct rcar_pcie *pcie) base = virt_to_phys((void *)msi->pages); rcar_pci_write_reg(pcie, base | MSIFE, PCIEMSIALR); - rcar_pci_write_reg(pcie, 0, PCIEMSIAUR); + rcar_pci_write_reg(pcie, base >> 32, PCIEMSIAUR); /* enable all MSI interrupts */ rcar_pci_write_reg(pcie, 0xffffffff, PCIEMSIIER);