diff mbox series

[V5,20/27] PCI: tegra: Use legacy IRQ for port service drivers

Message ID 20190617173952.29363-21-mmaddireddy@nvidia.com (mailing list archive)
State Superseded, archived
Headers show
Series Enable Tegra PCIe root port features | expand

Commit Message

Manikanta Maddireddy June 17, 2019, 5:39 p.m. UTC
Tegra signals PCIe services like AER, PME, etc. over legacy IRQ line.
By default, service drivers register interrupt routine over MSI IRQ line.
Use pcie_pme_disable_msi() function to disable MSI for service drivers.

PME and AER interrupts registered to MSI without this change,
cat /proc/interrupts | grep -i pci
36: 21 0 0 0 0 0 GICv2 104 Level       PCIE
37: 35 0 0 0 0 0 GICv2 105 Level       Tegra PCIe MSI
76: 0  0 0 0 0 0 Tegra PCIe MSI 0 Edge PCIe PME, aerdrv, PCIe BW notif

PME and AER interrupts registered to legacy IRQ with this change,
cat /proc/interrupts | grep -i pci
36: 33 0 0 0 0 0 GICv2 104 Level      PCIE, PCIe PME, aerdrv, PCIe BW notif
37: 52 0 0 0 0 0 GICv2 105 Level      Tegra PCIe MSI

Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
---
V5: No change

V4: No change

V3: Corrected typo in commit log

V2: No change

 drivers/pci/controller/pci-tegra.c | 4 ++++
 1 file changed, 4 insertions(+)

Comments

Manikanta Maddireddy June 18, 2019, 5:47 a.m. UTC | #1
On 17-Jun-19 11:09 PM, Manikanta Maddireddy wrote:
> Tegra signals PCIe services like AER, PME, etc. over legacy IRQ line.
> By default, service drivers register interrupt routine over MSI IRQ line.
> Use pcie_pme_disable_msi() function to disable MSI for service drivers.
>
> PME and AER interrupts registered to MSI without this change,
> cat /proc/interrupts | grep -i pci
> 36: 21 0 0 0 0 0 GICv2 104 Level       PCIE
> 37: 35 0 0 0 0 0 GICv2 105 Level       Tegra PCIe MSI
> 76: 0  0 0 0 0 0 Tegra PCIe MSI 0 Edge PCIe PME, aerdrv, PCIe BW notif
>
> PME and AER interrupts registered to legacy IRQ with this change,
> cat /proc/interrupts | grep -i pci
> 36: 33 0 0 0 0 0 GICv2 104 Level      PCIE, PCIe PME, aerdrv, PCIe BW notif
> 37: 52 0 0 0 0 0 GICv2 105 Level      Tegra PCIe MSI
>
> Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> Acked-by: Thierry Reding <treding@nvidia.com>
> ---
> V5: No change
>
> V4: No change
>
> V3: Corrected typo in commit log
>
> V2: No change
>
>  drivers/pci/controller/pci-tegra.c | 4 ++++
>  1 file changed, 4 insertions(+)
>
> diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> index 73d5a8841405..9429c0c6a1f3 100644
> --- a/drivers/pci/controller/pci-tegra.c
> +++ b/drivers/pci/controller/pci-tegra.c
> @@ -41,6 +41,7 @@
>  #include <soc/tegra/pmc.h>
>  
>  #include "../pci.h"
> +#include "../pcie/portdrv.h"
>  
>  #define INT_PCI_MSI_NR (8 * 32)
>  
> @@ -2725,6 +2726,9 @@ static int tegra_pcie_probe(struct platform_device *pdev)
>  		goto put_resources;
>  	}
>  
> +	/* Switch to legacy IRQ for PCIe services like AER, PME*/
> +	pcie_pme_disable_msi();
> +
>  	pm_runtime_enable(pcie->dev);
>  	err = pm_runtime_get_sync(pcie->dev);
>  	if (err) {

Hi Lorenzo,

I forgot to address Bjorn's comment here, I will correct this in V6.
Let me know if I can publish it today or you want me to wait until
you look into other patches.

Manikanta
Lorenzo Pieralisi June 18, 2019, 1:35 p.m. UTC | #2
On Tue, Jun 18, 2019 at 11:17:49AM +0530, Manikanta Maddireddy wrote:
> 
> 
> On 17-Jun-19 11:09 PM, Manikanta Maddireddy wrote:
> > Tegra signals PCIe services like AER, PME, etc. over legacy IRQ line.
> > By default, service drivers register interrupt routine over MSI IRQ line.
> > Use pcie_pme_disable_msi() function to disable MSI for service drivers.
> >
> > PME and AER interrupts registered to MSI without this change,
> > cat /proc/interrupts | grep -i pci
> > 36: 21 0 0 0 0 0 GICv2 104 Level       PCIE
> > 37: 35 0 0 0 0 0 GICv2 105 Level       Tegra PCIe MSI
> > 76: 0  0 0 0 0 0 Tegra PCIe MSI 0 Edge PCIe PME, aerdrv, PCIe BW notif
> >
> > PME and AER interrupts registered to legacy IRQ with this change,
> > cat /proc/interrupts | grep -i pci
> > 36: 33 0 0 0 0 0 GICv2 104 Level      PCIE, PCIe PME, aerdrv, PCIe BW notif
> > 37: 52 0 0 0 0 0 GICv2 105 Level      Tegra PCIe MSI
> >
> > Signed-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>
> > Acked-by: Thierry Reding <treding@nvidia.com>
> > ---
> > V5: No change
> >
> > V4: No change
> >
> > V3: Corrected typo in commit log
> >
> > V2: No change
> >
> >  drivers/pci/controller/pci-tegra.c | 4 ++++
> >  1 file changed, 4 insertions(+)
> >
> > diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
> > index 73d5a8841405..9429c0c6a1f3 100644
> > --- a/drivers/pci/controller/pci-tegra.c
> > +++ b/drivers/pci/controller/pci-tegra.c
> > @@ -41,6 +41,7 @@
> >  #include <soc/tegra/pmc.h>
> >  
> >  #include "../pci.h"
> > +#include "../pcie/portdrv.h"
> >  
> >  #define INT_PCI_MSI_NR (8 * 32)
> >  
> > @@ -2725,6 +2726,9 @@ static int tegra_pcie_probe(struct platform_device *pdev)
> >  		goto put_resources;
> >  	}
> >  
> > +	/* Switch to legacy IRQ for PCIe services like AER, PME*/
> > +	pcie_pme_disable_msi();
> > +
> >  	pm_runtime_enable(pcie->dev);
> >  	err = pm_runtime_get_sync(pcie->dev);
> >  	if (err) {
> 
> Hi Lorenzo,
> 
> I forgot to address Bjorn's comment here, I will correct this in V6.
> Let me know if I can publish it today or you want me to wait until
> you look into other patches.

It should be fine to post v6 but please pay attention next time, it has
been a while since this patch should have been updated.

Lorenzo
diff mbox series

Patch

diff --git a/drivers/pci/controller/pci-tegra.c b/drivers/pci/controller/pci-tegra.c
index 73d5a8841405..9429c0c6a1f3 100644
--- a/drivers/pci/controller/pci-tegra.c
+++ b/drivers/pci/controller/pci-tegra.c
@@ -41,6 +41,7 @@ 
 #include <soc/tegra/pmc.h>
 
 #include "../pci.h"
+#include "../pcie/portdrv.h"
 
 #define INT_PCI_MSI_NR (8 * 32)
 
@@ -2725,6 +2726,9 @@  static int tegra_pcie_probe(struct platform_device *pdev)
 		goto put_resources;
 	}
 
+	/* Switch to legacy IRQ for PCIe services like AER, PME*/
+	pcie_pme_disable_msi();
+
 	pm_runtime_enable(pcie->dev);
 	err = pm_runtime_get_sync(pcie->dev);
 	if (err) {