Message ID | 20190618180206.4908-26-mmaddireddy@nvidia.com (mailing list archive) |
---|---|
State | New, archived |
Delegated to: | Bjorn Helgaas |
Headers | show
Return-Path: <linux-pci-owner@kernel.org> Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 984AC76 for <patchwork-linux-pci@patchwork.kernel.org>; Tue, 18 Jun 2019 18:03:40 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 8AB2528B27 for <patchwork-linux-pci@patchwork.kernel.org>; Tue, 18 Jun 2019 18:03:40 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7F17328B3D; Tue, 18 Jun 2019 18:03:40 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 2DAEA28B27 for <patchwork-linux-pci@patchwork.kernel.org>; Tue, 18 Jun 2019 18:03:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730304AbfFRSDj (ORCPT <rfc822;patchwork-linux-pci@patchwork.kernel.org>); Tue, 18 Jun 2019 14:03:39 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:8883 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730299AbfFRSDj (ORCPT <rfc822;linux-pci@vger.kernel.org>); Tue, 18 Jun 2019 14:03:39 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id <B5d09277a0000>; Tue, 18 Jun 2019 11:03:38 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Tue, 18 Jun 2019 11:03:38 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Tue, 18 Jun 2019 11:03:38 -0700 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Tue, 18 Jun 2019 18:03:38 +0000 Received: from manikanta-bm2.nvidia.com (10.124.1.5) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server id 15.0.1473.3 via Frontend Transport; Tue, 18 Jun 2019 18:03:35 +0000 From: Manikanta Maddireddy <mmaddireddy@nvidia.com> To: <thierry.reding@gmail.com>, <bhelgaas@google.com>, <robh+dt@kernel.org>, <mark.rutland@arm.com>, <jonathanh@nvidia.com>, <lorenzo.pieralisi@arm.com>, <vidyas@nvidia.com> CC: <linux-tegra@vger.kernel.org>, <linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>, Manikanta Maddireddy <mmaddireddy@nvidia.com> Subject: [PATCH V6 25/27] PCI: Add DT binding for "reset-gpios" property Date: Tue, 18 Jun 2019 23:32:04 +0530 Message-ID: <20190618180206.4908-26-mmaddireddy@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190618180206.4908-1-mmaddireddy@nvidia.com> References: <20190618180206.4908-1-mmaddireddy@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Content-Type: text/plain DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1560881018; bh=zuCY1YxTpZbKv0B8/cyLgVLtOtOZnaGMb4im0zN+Xvw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=bQ1t45ZDEpyYHAy0VewW7WfYjQ5GlV1lc1TrUhQv08RgN3Eek0aHyQuc6jNCus1wX 8pz0/parK3xlS4mc8X4+S4EQdjYa2v6CxD05FPz5kCIJ5immA2360MI/hldYedCRUz 3DP1yDwYki7AFj7jUwWmlxeY/9zaC/w93e4GOjva+x9c6vW+iJz3oJRn+AJII8i4He CszPxmy37bJw1JSvZv0Dkyox2Qax3AfeUOGw1/xoIe/Z9sDbDirrgckRFAlszy1qNp 5Nu0LA87rm3uSALu6ZjVGUt7NzVzVk8QSRzfjbA8Oj0FmaBmQ47o94MZBTZbL5pmZC xk9RLxq0GBAHQ== Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: <linux-pci.vger.kernel.org> X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP |
Series |
Enable Tegra PCIe root port features
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expand
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diff --git a/Documentation/devicetree/bindings/pci/pci.txt b/Documentation/devicetree/bindings/pci/pci.txt index c77981c5dd18..79124898aa5b 100644 --- a/Documentation/devicetree/bindings/pci/pci.txt +++ b/Documentation/devicetree/bindings/pci/pci.txt @@ -24,3 +24,6 @@ driver implementation may support the following properties: unsupported link speed, for instance, trying to do training for unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2' for gen2, and '1' for gen1. Any other values are invalid. +- reset-gpios: + If present this property specifies PERST# GPIO. Host drivers can parse the + GPIO and apply fundamental reset to endpoints.