From patchwork Thu Jul 18 09:47:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chocron, Jonathan" X-Patchwork-Id: 11048743 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id F08F4912 for ; Thu, 18 Jul 2019 09:48:15 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id DD396274A3 for ; Thu, 18 Jul 2019 09:48:15 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CE43E285C7; Thu, 18 Jul 2019 09:48:15 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 73AFF274A3 for ; Thu, 18 Jul 2019 09:48:15 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389863AbfGRJsL (ORCPT ); Thu, 18 Jul 2019 05:48:11 -0400 Received: from smtp-fw-6001.amazon.com ([52.95.48.154]:37394 "EHLO smtp-fw-6001.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726649AbfGRJsL (ORCPT ); Thu, 18 Jul 2019 05:48:11 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1563443290; x=1594979290; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=sWKyFvHBIDxbEG0LkDFJzh7iNZ7ckThMxb355rVm1NU=; b=ZmXdXszlJm0rcCjOrB+Gv5yBLDiBJMY9YXcmBhCtBHHBZ7vV4P22g+mo evSUY2SPYYSt2U2L8glHWL3ksq2RiA9dSK2BvLkKVzA2ni2qVtRjKND1n J7n/VT/1eUq638YwRzQ1yvuaHQ0Bx74UpNs39MV8lxI/pjYHBsQb+/Mdr k=; X-IronPort-AV: E=Sophos;i="5.64,276,1559520000"; d="scan'208";a="405475072" Received: from iad6-co-svc-p1-lb1-vlan3.amazon.com (HELO email-inbound-relay-1a-715bee71.us-east-1.amazon.com) ([10.124.125.6]) by smtp-border-fw-out-6001.iad6.amazon.com with ESMTP; 18 Jul 2019 09:47:49 +0000 Received: from EX13MTAUWA001.ant.amazon.com (iad55-ws-svc-p15-lb9-vlan2.iad.amazon.com [10.40.159.162]) by email-inbound-relay-1a-715bee71.us-east-1.amazon.com (Postfix) with ESMTPS id BF02EA01A8; Thu, 18 Jul 2019 09:47:48 +0000 (UTC) Received: from EX13D13UWA001.ant.amazon.com (10.43.160.136) by EX13MTAUWA001.ant.amazon.com (10.43.160.118) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Thu, 18 Jul 2019 09:47:48 +0000 Received: from u9ff250417f405e.ant.amazon.com (10.43.161.219) by EX13D13UWA001.ant.amazon.com (10.43.160.136) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Thu, 18 Jul 2019 09:47:42 +0000 From: Jonathan Chocron To: , , , , , CC: , , , , , , , , , , , Subject: [PATCH v2 7/8] PCI: dw: Add validation that PCIe core is set to correct mode Date: Thu, 18 Jul 2019 12:47:17 +0300 Message-ID: <20190718094718.25083-3-jonnyc@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718094531.21423-1-jonnyc@amazon.com> References: <20190718094531.21423-1-jonnyc@amazon.com> MIME-Version: 1.0 X-Originating-IP: [10.43.161.219] X-ClientProxiedBy: EX13D19UWC001.ant.amazon.com (10.43.162.64) To EX13D13UWA001.ant.amazon.com (10.43.160.136) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some PCIe controllers can be set to either Host or EP according to some early boot FW. To make sure there is no discrepancy (e.g. FW configured the port to EP mode while the DT specifies it as a host bridge or vice versa), a check has been added for each mode. Signed-off-by: Jonathan Chocron Acked-by: Gustavo Pimentel --- drivers/pci/controller/dwc/pcie-designware-ep.c | 8 ++++++++ drivers/pci/controller/dwc/pcie-designware-host.c | 8 ++++++++ 2 files changed, 16 insertions(+) diff --git a/drivers/pci/controller/dwc/pcie-designware-ep.c b/drivers/pci/controller/dwc/pcie-designware-ep.c index 2bf5a35c0570..00e59a134b93 100644 --- a/drivers/pci/controller/dwc/pcie-designware-ep.c +++ b/drivers/pci/controller/dwc/pcie-designware-ep.c @@ -531,6 +531,7 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep) int ret; u32 reg; void *addr; + u8 hdr_type; unsigned int nbars; unsigned int offset; struct pci_epc *epc; @@ -543,6 +544,13 @@ int dw_pcie_ep_init(struct dw_pcie_ep *ep) return -EINVAL; } + hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE); + if (hdr_type != PCI_HEADER_TYPE_NORMAL) { + dev_err(pci->dev, "PCIe controller is not set to EP mode (hdr_type:0x%x)!\n", + hdr_type); + return -EIO; + } + ret = of_property_read_u32(np, "num-ib-windows", &ep->num_ib_windows); if (ret < 0) { dev_err(dev, "Unable to read *num-ib-windows* property\n"); diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index f93252d0da5b..d2ca748e4c85 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -323,6 +323,7 @@ int dw_pcie_host_init(struct pcie_port *pp) struct pci_bus *child; struct pci_host_bridge *bridge; struct resource *cfg_res; + u8 hdr_type; int ret; raw_spin_lock_init(&pci->pp.lock); @@ -396,6 +397,13 @@ int dw_pcie_host_init(struct pcie_port *pp) } } + hdr_type = dw_pcie_readb_dbi(pci, PCI_HEADER_TYPE); + if (hdr_type != PCI_HEADER_TYPE_BRIDGE) { + dev_err(pci->dev, "PCIe controller is not set to bridge type (hdr_type: 0x%x)!\n", + hdr_type); + return -EIO; + } + pp->mem_base = pp->mem->start; if (!pp->va_cfg0_base) {