From patchwork Thu Jul 18 09:47:18 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Chocron, Jonathan" X-Patchwork-Id: 11048741 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A48E76C5 for ; Thu, 18 Jul 2019 09:48:01 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9523C274A3 for ; Thu, 18 Jul 2019 09:48:01 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9343A2880B; Thu, 18 Jul 2019 09:48:01 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,MAILING_LIST_MULTI,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 3D4F0274A3 for ; Thu, 18 Jul 2019 09:48:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2389904AbfGRJsA (ORCPT ); Thu, 18 Jul 2019 05:48:00 -0400 Received: from smtp-fw-9101.amazon.com ([207.171.184.25]:20365 "EHLO smtp-fw-9101.amazon.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726649AbfGRJsA (ORCPT ); Thu, 18 Jul 2019 05:48:00 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=amazon.com; i=@amazon.com; q=dns/txt; s=amazon201209; t=1563443279; x=1594979279; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=r3UejI0fEyx4nycQ3vf7JrpqMGHRZyoys9vsmeuSdCk=; b=GDC5OizS5WHpC3cbPd/r5NuDPuP1vwku0BiQd6EopTebsOWOmgEvdhdh CsNwPPvTOLexzBRsuerepZpGzWRXy0hzPva5xjML/DGlch+IDfKVW0ZpY RN5+jvWmckV2EqZaHZ5iTx5O+wsonJsmsjQwB6Ks4U40WXuU7fJmV0MVj s=; X-IronPort-AV: E=Sophos;i="5.64,276,1559520000"; d="scan'208";a="816920794" Received: from sea3-co-svc-lb6-vlan2.sea.amazon.com (HELO email-inbound-relay-1d-f273de60.us-east-1.amazon.com) ([10.47.22.34]) by smtp-border-fw-out-9101.sea19.amazon.com with ESMTP; 18 Jul 2019 09:47:58 +0000 Received: from EX13MTAUWA001.ant.amazon.com (iad55-ws-svc-p15-lb9-vlan2.iad.amazon.com [10.40.159.162]) by email-inbound-relay-1d-f273de60.us-east-1.amazon.com (Postfix) with ESMTPS id 2F37AA28ED; Thu, 18 Jul 2019 09:47:54 +0000 (UTC) Received: from EX13D13UWA001.ant.amazon.com (10.43.160.136) by EX13MTAUWA001.ant.amazon.com (10.43.160.118) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Thu, 18 Jul 2019 09:47:54 +0000 Received: from u9ff250417f405e.ant.amazon.com (10.43.161.219) by EX13D13UWA001.ant.amazon.com (10.43.160.136) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Thu, 18 Jul 2019 09:47:48 +0000 From: Jonathan Chocron To: , , , , , CC: , , , , , , , , , , , Subject: [PATCH v2 8/8] PCI: dw: Add support for PCI_PROBE_ONLY/PCI_REASSIGN_ALL_BUS flags Date: Thu, 18 Jul 2019 12:47:18 +0300 Message-ID: <20190718094718.25083-4-jonnyc@amazon.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190718094531.21423-1-jonnyc@amazon.com> References: <20190718094531.21423-1-jonnyc@amazon.com> MIME-Version: 1.0 X-Originating-IP: [10.43.161.219] X-ClientProxiedBy: EX13D19UWC001.ant.amazon.com (10.43.162.64) To EX13D13UWA001.ant.amazon.com (10.43.160.136) Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This basically aligns the usage of PCI_PROBE_ONLY and PCI_REASSIGN_ALL_BUS in dw_pcie_host_init() with the logic in pci_host_common_probe(). Now it will be possible to control via the devicetree whether to just probe the PCI bus (in cases where FW already configured it) or to fully configure it. Signed-off-by: Jonathan Chocron --- .../pci/controller/dwc/pcie-designware-host.c | 23 +++++++++++++++---- 1 file changed, 19 insertions(+), 4 deletions(-) diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c index d2ca748e4c85..0a294d8aa21a 100644 --- a/drivers/pci/controller/dwc/pcie-designware-host.c +++ b/drivers/pci/controller/dwc/pcie-designware-host.c @@ -342,6 +342,8 @@ int dw_pcie_host_init(struct pcie_port *pp) if (!bridge) return -ENOMEM; + of_pci_check_probe_only(); + ret = devm_of_pci_get_host_bridge_resources(dev, 0, 0xff, &bridge->windows, &pp->io_base); if (ret) @@ -474,6 +476,10 @@ int dw_pcie_host_init(struct pcie_port *pp) pp->root_bus_nr = pp->busn->start; + /* Do not reassign bus nums if probe only */ + if (!pci_has_flag(PCI_PROBE_ONLY)) + pci_add_flags(PCI_REASSIGN_ALL_BUS); + bridge->dev.parent = dev; bridge->sysdata = pp; bridge->busnr = pp->root_bus_nr; @@ -490,11 +496,20 @@ int dw_pcie_host_init(struct pcie_port *pp) if (pp->ops->scan_bus) pp->ops->scan_bus(pp); - pci_bus_size_bridges(pp->root_bus); - pci_bus_assign_resources(pp->root_bus); + /* + * We insert PCI resources into the iomem_resource and + * ioport_resource trees in either pci_bus_claim_resources() + * or pci_bus_assign_resources(). + */ + if (pci_has_flag(PCI_PROBE_ONLY)) { + pci_bus_claim_resources(pp->root_bus); + } else { + pci_bus_size_bridges(pp->root_bus); + pci_bus_assign_resources(pp->root_bus); - list_for_each_entry(child, &pp->root_bus->children, node) - pcie_bus_configure_settings(child); + list_for_each_entry(child, &pp->root_bus->children, node) + pcie_bus_configure_settings(child); + } pci_bus_add_devices(pp->root_bus); return 0;