[PATCHv9,12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4

From: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>

From: "Z.q. Hou" <zhiqiang.hou@nxp.com>
To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>,
        "linux-arm-kernel@lists.infradead.org"
        <linux-arm-kernel@lists.infradead.org>,
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        "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
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        "robh+dt@kernel.org" <robh+dt@kernel.org>,
        "arnd@arndb.de" <arnd@arndb.de>,
        "mark.rutland@arm.com" <mark.rutland@arm.com>,
        "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>,
        "shawnguo@kernel.org" <shawnguo@kernel.org>,
        "m.karthikeyan@mobiveil.co.in" <m.karthikeyan@mobiveil.co.in>,
        Leo Li <leoyang.li@nxp.com>,
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CC: Mingkai Hu <mingkai.hu@nxp.com>,
        "M.h. Lian" <minghuan.lian@nxp.com>,
        Xiaowei Bao <xiaowei.bao@nxp.com>,
        "Z.q. Hou" <zhiqiang.hou@nxp.com>
Subject: [PATCHv9 12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4
Thread-Topic: [PATCHv9 12/12] arm64: defconfig: Enable
 CONFIG_PCIE_LAYERSCAPE_GEN4
Thread-Index: AQHVn1Uc4M4RucFezkSHTTtL1plrKw==
Date: Wed, 20 Nov 2019 03:46:37 +0000
Message-ID: <20191120034451.30102-13-Zhiqiang.Hou@nxp.com>
References: <20191120034451.30102-1-Zhiqiang.Hou@nxp.com>
In-Reply-To: <20191120034451.30102-1-Zhiqiang.Hou@nxp.com>
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Message ID	20191120034451.30102-13-Zhiqiang.Hou@nxp.com (mailing list archive)
State	Superseded, archived
Delegated to:	Lorenzo Pieralisi
Headers	show Return-Path: <SRS0=MVLW=ZM=vger.kernel.org=linux-pci-owner@kernel.org> From: "Z.q. Hou" <zhiqiang.hou@nxp.com> To: "linux-pci@vger.kernel.org" <linux-pci@vger.kernel.org>, "linux-arm-kernel@lists.infradead.org" <linux-arm-kernel@lists.infradead.org>, "devicetree@vger.kernel.org" <devicetree@vger.kernel.org>, "linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>, "bhelgaas@google.com" <bhelgaas@google.com>, "robh+dt@kernel.org" <robh+dt@kernel.org>, "arnd@arndb.de" <arnd@arndb.de>, "mark.rutland@arm.com" <mark.rutland@arm.com>, "l.subrahmanya@mobiveil.co.in" <l.subrahmanya@mobiveil.co.in>, "shawnguo@kernel.org" <shawnguo@kernel.org>, "m.karthikeyan@mobiveil.co.in" <m.karthikeyan@mobiveil.co.in>, Leo Li <leoyang.li@nxp.com>, "lorenzo.pieralisi@arm.com" <lorenzo.pieralisi@arm.com>, "catalin.marinas@arm.com" <catalin.marinas@arm.com>, "will.deacon@arm.com" <will.deacon@arm.com>, "andrew.murray@arm.com" <andrew.murray@arm.com> CC: Mingkai Hu <mingkai.hu@nxp.com>, "M.h. Lian" <minghuan.lian@nxp.com>, Xiaowei Bao <xiaowei.bao@nxp.com>, "Z.q. Hou" <zhiqiang.hou@nxp.com> Subject: [PATCHv9 12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 Thread-Topic: [PATCHv9 12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4 Thread-Index: AQHVn1Uc4M4RucFezkSHTTtL1plrKw== Date: Wed, 20 Nov 2019 03:46:37 +0000 Message-ID: <20191120034451.30102-13-Zhiqiang.Hou@nxp.com> References: <20191120034451.30102-1-Zhiqiang.Hou@nxp.com> In-Reply-To: <20191120034451.30102-1-Zhiqiang.Hou@nxp.com> Accept-Language: zh-CN, en-US Content-Language: en-US received-spf: None (protection.outlook.com: nxp.com does not designate permitted sender hosts) Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk
Series	PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs \| expand [PATCHv9,00/12] PCI: Recode Mobiveil driver and add PCIe Gen4 driver for NXP Layerscape SoCs [PATCHv9,01/12] PCI: mobiveil: Re-abstract the private structure [PATCHv9,02/12] PCI: mobiveil: Move the host initialization into a routine [PATCHv9,03/12] PCI: mobiveil: Collect the interrupt related operations into a routine [PATCHv9,04/12] PCI: mobiveil: Modularize the Mobiveil PCIe Host Bridge IP driver [PATCHv9,05/12] PCI: mobiveil: Add callback function for interrupt initialization [PATCHv9,06/12] PCI: mobiveil: Add callback function for link up check [PATCHv9,07/12] PCI: mobiveil: Make mobiveil_host_init() can be used to re-init host [PATCHv9,08/12] PCI: mobiveil: Add 8-bit and 16-bit CSR register accessors [PATCHv9,09/12] dt-bindings: PCI: Add NXP Layerscape SoCs PCIe Gen4 controller [PATCHv9,10/12] PCI: mobiveil: Add PCIe Gen4 RC driver for NXP Layerscape SoCs [PATCHv9,11/12] arm64: dts: lx2160a: Add PCIe controller DT nodes [PATCHv9,12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4

[PATCHv9,12/12] arm64: defconfig: Enable CONFIG_PCIE_LAYERSCAPE_GEN4

Commit Message

Patch