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[165.204.84.11]) by smtp.gmail.com with ESMTPSA id a189sm7440521ywh.92.2020.01.14.12.55.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Jan 2020 12:55:36 -0800 (PST) From: Alex Deucher X-Google-Original-From: Alex Deucher To: amd-gfx@lists.freedesktop.org, linux-pci@vger.kernel.org, bhelgaas@google.com Cc: Alex Deucher Subject: [PATCH 2/2] pci: add ATS quirk for navi14 board (v2) Date: Tue, 14 Jan 2020 15:55:23 -0500 Message-Id: <20200114205523.1054271-3-alexander.deucher@amd.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200114205523.1054271-1-alexander.deucher@amd.com> References: <20200114205523.1054271-1-alexander.deucher@amd.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org On some harvest configurations, a driver needs to properly initialize some of the caches on the GPU for instances that are harvested (parts of the chip that are disabled due to silicon flaws). For navi we implemented this in the vbios, but it appears some boards went to production with an older vbios. Add a quirk for this board. The necessary code to fix this up is too complex to add as a quirk. v2: use revision id. Only revision 0xc5 should be affected. Bug: https://gitlab.freedesktop.org/drm/amd/issues/1015 Signed-off-by: Alex Deucher --- drivers/pci/quirks.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 6569dacbb48b..f7a5e1c3c523 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -5087,6 +5087,12 @@ static void quirk_amd_harvest_no_ats(struct pci_dev *pdev) pci_info(pdev, "disabling ATS\n"); pdev->ats_cap = 0; break; + case 0x7340: + if (pdev->revision == 0xc5) { + pci_info(pdev, "disabling ATS\n"); + pdev->ats_cap = 0; + } + break; default: break; } @@ -5096,6 +5102,8 @@ static void quirk_amd_harvest_no_ats(struct pci_dev *pdev) DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x98e4, quirk_amd_harvest_no_ats); /* AMD Iceland dGPU */ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x6900, quirk_amd_harvest_no_ats); +/* AMD Navi14 dGPU */ +DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATI, 0x7340, quirk_amd_harvest_no_ats); #endif /* CONFIG_PCI_ATS */ /* Freescale PCIe doesn't support MSI in RC mode */