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[80.180.205.117]) by smtp.googlemail.com with ESMTPSA id z16sm30523edm.52.2020.04.09.17.47.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 09 Apr 2020 17:47:50 -0700 (PDT) From: Ansuel Smith To: devicetree@vger.kernel.org Cc: Ansuel Smith , Richard Zhu , Lucas Stach , Bjorn Helgaas , Rob Herring , Mark Rutland , Shawn Guo , Sascha Hauer , Pengutronix Kernel Team , Fabio Estevam , NXP Linux Team , Lorenzo Pieralisi , Andrew Murray , linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: [PATCH 2/4] drivers: pci: dwc: pci-imx6: update binding to generic name Date: Fri, 10 Apr 2020 02:47:36 +0200 Message-Id: <20200410004738.19668-3-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200410004738.19668-1-ansuelsmth@gmail.com> References: <20200410004738.19668-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Rename specific bindings to generic name. Signed-off-by: Ansuel Smith --- drivers/pci/controller/dwc/pci-imx6.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c index acfbd34032a8..4ac140e007b4 100644 --- a/drivers/pci/controller/dwc/pci-imx6.c +++ b/drivers/pci/controller/dwc/pci-imx6.c @@ -1146,28 +1146,28 @@ static int imx6_pcie_probe(struct platform_device *pdev) } /* Grab PCIe PHY Tx Settings */ - if (of_property_read_u32(node, "fsl,tx-deemph-gen1", + if (of_property_read_u32(node, "tx-deemph-gen1", &imx6_pcie->tx_deemph_gen1)) imx6_pcie->tx_deemph_gen1 = 0; - if (of_property_read_u32(node, "fsl,tx-deemph-gen2-3p5db", + if (of_property_read_u32(node, "tx-deemph-gen2-3p5db", &imx6_pcie->tx_deemph_gen2_3p5db)) imx6_pcie->tx_deemph_gen2_3p5db = 0; - if (of_property_read_u32(node, "fsl,tx-deemph-gen2-6db", + if (of_property_read_u32(node, "tx-deemph-gen2-6db", &imx6_pcie->tx_deemph_gen2_6db)) imx6_pcie->tx_deemph_gen2_6db = 20; - if (of_property_read_u32(node, "fsl,tx-swing-full", + if (of_property_read_u32(node, "tx-swing-full", &imx6_pcie->tx_swing_full)) imx6_pcie->tx_swing_full = 127; - if (of_property_read_u32(node, "fsl,tx-swing-low", + if (of_property_read_u32(node, "tx-swing-low", &imx6_pcie->tx_swing_low)) imx6_pcie->tx_swing_low = 127; /* Limit link speed */ - ret = of_property_read_u32(node, "fsl,max-link-speed", + ret = of_property_read_u32(node, "max-link-speed", &imx6_pcie->link_gen); if (ret) imx6_pcie->link_gen = 1;