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[92.34.210.240]) by smtp.gmail.com with ESMTPSA id y136sm2590835lfa.79.2020.07.26.15.07.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Jul 2020 15:07:21 -0700 (PDT) From: Ian Kumlien To: linux-pci@vger.kernel.org Cc: Ian Kumlien Subject: [PATCH] Use maximum latency when determining L1 ASPM Date: Mon, 27 Jul 2020 00:06:53 +0200 Message-Id: <20200726220653.635852-2-ian.kumlien@gmail.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200726220653.635852-1-ian.kumlien@gmail.com> References: <20200726220653.635852-1-ian.kumlien@gmail.com> MIME-Version: 1.0 Sender: linux-pci-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org The current solution verifies per "hop" but doesn't check the maximum latency, instead it checks the current "hops" max latency for upstream and downstrea, This would work if all "hops" have the same latency, but: root -> a -> b -> c -> endpoint If c or b has the higest latency, it might not register Fix this by maintaining a maximum value for comparison Signed-off-by: Ian Kumlien --- drivers/pci/pcie/aspm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pcie/aspm.c b/drivers/pci/pcie/aspm.c index b17e5ffd31b1..bd53fba7f382 100644 --- a/drivers/pci/pcie/aspm.c +++ b/drivers/pci/pcie/aspm.c @@ -434,7 +434,7 @@ static void pcie_get_aspm_reg(struct pci_dev *pdev, static void pcie_aspm_check_latency(struct pci_dev *endpoint) { - u32 latency, l1_switch_latency = 0; + u32 latency, l1_max_latency = 0, l1_switch_latency = 0; struct aspm_latency *acceptable; struct pcie_link_state *link; @@ -470,8 +470,9 @@ static void pcie_aspm_check_latency(struct pci_dev *endpoint) * substate latencies (and hence do not do any check). */ latency = max_t(u32, link->latency_up.l1, link->latency_dw.l1); + l1_max_latency = max_t(u32, latency, l1_max_latency); if ((link->aspm_capable & ASPM_STATE_L1) && - (latency + l1_switch_latency > acceptable->l1)) + (l1_max_latency + l1_switch_latency > acceptable->l1)) link->aspm_capable &= ~ASPM_STATE_L1; l1_switch_latency += 1000;