From patchwork Thu Oct 1 06:00:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Srinath Mannam X-Patchwork-Id: 11810931 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 3C6596CB for ; Thu, 1 Oct 2020 06:01:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1053D21D7D for ; Thu, 1 Oct 2020 06:01:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="dhx/8554" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730646AbgJAGBY (ORCPT ); Thu, 1 Oct 2020 02:01:24 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36036 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725878AbgJAGBW (ORCPT ); Thu, 1 Oct 2020 02:01:22 -0400 Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 2D468C061755 for ; Wed, 30 Sep 2020 23:01:22 -0700 (PDT) Received: by mail-pf1-x443.google.com with SMTP id w7so3492964pfi.4 for ; Wed, 30 Sep 2020 23:01:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XKniDKpGWozCfELydEqWMvqFyRW+NfHyXg+2i7qbqqg=; b=dhx/8554h34hwQVX55dDeA0n6onL+orcGNWROsIte/RfnpAvBWt2IQ9QbSKoS9Q6ZS kbcDXPRu2BswviYaM8KDc3va0CJgwk7P7ZIOVKYKO5rDvoiSm79gDLU+4oR1Pij79UM7 IIDD1pyVDvNf/dY/pRLZR9m0hxdNNT65RiRrM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XKniDKpGWozCfELydEqWMvqFyRW+NfHyXg+2i7qbqqg=; b=P7/QLwmnWhdzuC4zweOaid27X5MXmGCWcjPPiMwSp9EsZI7fOc0+eK6+WBZ7ZY7pEl FXCz7B0HXvb+tagHR10wpOAZpx5gmS7+R0jxYoQrCa+j7tEklVWyUvovsUeeTgCKvisS Bt3nvL2jQ9/evErVRlS2ZhUwYa4nIEWBup0WhlbeUgSQ1L2dm1dfHIeYgaJdAVpLOG2i AppYLAEpLDxjoQ4JEky7UFNWXaI/KVwdiDOFaJ+UemDNHfyyVw4k2+wl0Ui5j70JvthG QXEHSk19d/qeUUo8oavhMzC6EnuQ6iV5covjlqMZ2HDrdLCTigaEsJHBVWLHb7xABDVP mcuw== X-Gm-Message-State: AOAM530FTDUNqTr86qRlXuJaTE72BuW3o1Y3dHi6LJFLCKt969tXelFB gQvRnOwgysRLiLwStbAE6O9ECQ== X-Google-Smtp-Source: ABdhPJwxM5L57TJZwmSnlRWv9mXMAi+RegGmDTyfFRPx7V+QrmL6rajMd24B+gMKgq1ovvMtJvJgsQ== X-Received: by 2002:a17:902:64c2:b029:d2:6356:867e with SMTP id y2-20020a17090264c2b02900d26356867emr5792617pli.32.1601532081551; Wed, 30 Sep 2020 23:01:21 -0700 (PDT) Received: from mannams-OptiPlex-7010.dhcp.broadcom.net ([192.19.234.250]) by smtp.gmail.com with ESMTPSA id l2sm4032112pjy.3.2020.09.30.23.01.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 30 Sep 2020 23:01:20 -0700 (PDT) From: Srinath Mannam To: Lorenzo Pieralisi , Bjorn Helgaas , Ray Jui Cc: bcm-kernel-feedback-list@broadcom.com, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Srinath Mannam Subject: [PATCH v3 3/3] PCI: iproc: Display PCIe Link information Date: Thu, 1 Oct 2020 11:30:54 +0530 Message-Id: <20201001060054.6616-4-srinath.mannam@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201001060054.6616-1-srinath.mannam@broadcom.com> References: <20201001060054.6616-1-srinath.mannam@broadcom.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org After successful linkup more comprehensive information about PCIe link speed and link width will be displayed to the console. Signed-off-by: Srinath Mannam --- drivers/pci/controller/pcie-iproc.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/pci/controller/pcie-iproc.c b/drivers/pci/controller/pcie-iproc.c index cc5b7823edeb..8ef2d1fe392c 100644 --- a/drivers/pci/controller/pcie-iproc.c +++ b/drivers/pci/controller/pcie-iproc.c @@ -1479,6 +1479,7 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) { struct device *dev; int ret; + struct pci_dev *pdev; struct pci_host_bridge *host = pci_host_bridge_from_priv(pcie); dev = pcie->dev; @@ -1542,6 +1543,11 @@ int iproc_pcie_setup(struct iproc_pcie *pcie, struct list_head *res) goto err_power_off_phy; } + for_each_pci_bridge(pdev, host->bus) { + if (pci_pcie_type(pdev) == PCI_EXP_TYPE_ROOT_PORT) + pcie_print_link_status(pdev); + } + return 0; err_power_off_phy: