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Mon, 19 Oct 2020 09:47:38 +0000 (GMT) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-pci@vger.kernel.org Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jaehoon Chung , Marek Szyprowski , Jingoo Han , Krzysztof Kozlowski , Bjorn Helgaas , Lorenzo Pieralisi , Vinod Koul , Kishon Vijay Abraham I , Rob Herring Subject: [PATCH 3/6] Documetation: dt-bindings: add the samsung,exynos-pcie-phy binding Date: Mon, 19 Oct 2020 11:47:12 +0200 Message-Id: <20201019094715.15343-4-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201019094715.15343-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprLKsWRmVeSWpSXmKPExsWy7djPc7q7E3rjDTZ+MLRY0pRhMf/IOVaL G7/aWC1WfJnJbnHhaQ+bxfnzG9gtLu+aw2Zxdt5xNosZ5/cxWbz5/YLdYu2Ru+wWrXuPsFvs vHOC2YHXY828NYweO2fdZfdYsKnUY9OqTjaPvi2rGD2O39jO5PF5k1wAexSXTUpqTmZZapG+ XQJXRtM3oYLzghXTzvYzNzAu4eti5OSQEDCRuL72DmsXIxeHkMAKRom7i+YyQzhfGCX6L92D ynxmlNjy7x0rTMvRp/OZQGwhgeWMEg9WW8J1zO3fxwaSYBMwlOh62wVkc3CICDhI/PhqAVLD LLCIWaKh/wgjSFxYIFLiz1JdEJNFQFVi3bc0EJNXwFZi8RwmiE3yEqs3HGAGsTkF7CS6Fi4D u01CYBm7xKr+m4wQRS4SW1+sYIGwhSVeHd/CDmHLSPzfCXImSEMzo8TDc2vZIZweRonLTTOg uq0l7pz7BXYns4CmxPpd+hBhR4mWF+vBzpQQ4JO48VYQJMwMZE7aNp0ZIswr0dEmBFGtJjHr +Dq4tQcvXIIq8ZDouykHCZyJjBJ9bzqYJjDKz0LYtYCRcRWjeGppcW56arFRXmq5XnFibnFp Xrpecn7uJkZgojn97/iXHYy7/iQdYhTgYFTi4X2Q3xMvxJpYVlyZe4hRgoNZSYTX6ezpOCHe lMTKqtSi/Pii0pzU4kOM0hwsSuK8xotexgoJpCeWpGanphakFsFkmTg4pRoYeUt6Z/BqPLrg eNVn5TvtFWezeeuqvGsDVloZR+pX2Bz58Pqu5OcZE/Zk+01/qM++82XY4qQXPx/NeHb+W+WV DSkmXiJzDe39H9tvZHeLlRWaH/xnuUBzeM+MzWaPVt445F9vH9/B89ZeVav4LKv5kUzJfK1S 49Sqgpv5c+M6NlYsP/vNMVlPiaU4I9FQi7moOBEAslznTTADAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFmpkkeLIzCtJLcpLzFFi42I5/e/4Xd3dCb3xBjv/SFssacqwmH/kHKvF jV9trBYrvsxkt7jwtIfN4vz5DewWl3fNYbM4O+84m8WM8/uYLN78fsFusfbIXXaL1r1H2C12 3jnB7MDrsWbeGkaPnbPusnss2FTqsWlVJ5tH35ZVjB7Hb2xn8vi8SS6APUrPpii/tCRVISO/ uMRWKdrQwkjP0NJCz8jEUs/Q2DzWyshUSd/OJiU1J7MstUjfLkEvo+mbUMF5wYppZ/uZGxiX 8HUxcnJICJhIHH06n6mLkYtDSGApo8TGP5tZIRIyEienNUDZwhJ/rnWxQRR9YpT4e2E/WIJN wFCi6y1IgpNDRMBJ4v3ki8wgRcwCa5glGtu6mUASwgLhEjO+XgOyOThYBFQl1n1LAzF5BWwl Fs9hgpgvL7F6wwFmEJtTwE6ia+EyMFsIqKRr5TSWCYx8CxgZVjGKpJYW56bnFhvpFSfmFpfm pesl5+duYgQG/7ZjP7fsYOx6F3yIUYCDUYmH90F+T7wQa2JZcWXuIUYJDmYlEV6ns6fjhHhT EiurUovy44tKc1KLDzGaAp00kVlKNDkfGJl5JfGGpobmFpaG5sbmxmYWSuK8HQIHY4QE0hNL UrNTUwtSi2D6mDg4pRoYBbz0Hi16ZvK/68EzxbPuh/4U/J/decL6kUmzNNN2tyeSOct3nnh5 tnfWxg/yV+xSdpyyPdLg9GdP9apmuVOsDl8rtk8p25QiHLgq8Wdw6PWPF263zVgmK+nfFfxH vtYh8voTz8zbW8VTXno2HNu9t39hi17ptvc8iw5tjnzWvHi5Xqdrc9w/HSWW4oxEQy3mouJE ALv+BHuUAgAA X-CMS-MailID: 20201019094739eucas1p17424b1224bf2a1a5b16c33deb4209166 X-Msg-Generator: CA X-RootMTR: 20201019094739eucas1p17424b1224bf2a1a5b16c33deb4209166 X-EPHeader: CA CMS-TYPE: 201P X-CMS-RootMailID: 20201019094739eucas1p17424b1224bf2a1a5b16c33deb4209166 References: <20201019094715.15343-1-m.szyprowski@samsung.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Jaehoon Chung Add dt-bindings for the Samsung Exynos PCIe PHY controller (Exynos5433 variant). Signed-off-by: Jaehoon Chung [mszyprow: updated the binding to latest driver changes, rewrote it in yaml, rewrote commit message] Signed-off-by: Marek Szyprowski --- .../bindings/phy/samsung,exynos-pcie-phy.yaml | 51 +++++++++++++++++++ 1 file changed, 51 insertions(+) create mode 100644 Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml diff --git a/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml new file mode 100644 index 000000000000..ce92d1e687e7 --- /dev/null +++ b/Documentation/devicetree/bindings/phy/samsung,exynos-pcie-phy.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/phy/samsung,exynos-pcie-phy.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC series PCIe PHY Device Tree Bindings + +maintainers: + - Jaehoon Chung + +properties: + "#phy-cells": + const: 0 + + compatible: + enum: + - samsung,exynos5433-pcie-phy + + reg: + maxItems: 1 + + samsung,pmu-syscon: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle for PMU system controller interface, used to + control PMU registers bits for PCIe PHY + + samsung,fsys-sysreg: + $ref: '/schemas/types.yaml#/definitions/phandle' + description: phandle for FSYS sysreg interface, used to control + sysreg registers bits for PCIe PHY + +required: + - "#phy-cells" + - compatible + - reg + - samsung,pmu-syscon + - samsung,fsys-sysreg + +additionalProperties: false + +examples: + - | + pcie_phy: pcie-phy@15680000 { + compatible = "samsung,exynos5433-pcie-phy"; + reg = <0x15680000 0x1000>; + samsung,pmu-syscon = <&pmu_system_controller>; + samsung,fsys-sysreg = <&syscon_fsys>; + #phy-cells = <0>; + }; +... \ No newline at end of file