Message ID | 20201019165555.8269-1-ansuelsmth@gmail.com (mailing list archive) |
---|---|
State | Accepted, archived |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | [RESEND] PCI: qcom: use PHY_REFCLK_USE_PAD only for ipq8064 | expand |
On Mon, Oct 19, 2020 at 06:55:55PM +0200, Ansuel Smith wrote: > The use of PHY_REFCLK_USE_PAD introduced a regression for apq8064 > devices. It was tested that while apq doesn't require the padding, ipq > SoC must use it or the kernel hangs on boot. > > Fixes: de3c4bf6489 ("PCI: qcom: Add support for tx term offset for rev 2.1.0") > Reported-by: Ilia Mirkin <imirkin@alum.mit.edu> > Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > Cc: stable@vger.kernel.org # v4.19+ > --- > drivers/pci/controller/dwc/pcie-qcom.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) Need qcom maintainer's ack, thanks. Lorenzo > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 3aac77a295ba..dad6e9ce66ba 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -387,7 +387,9 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) > > /* enable external reference clock */ > val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); > - val &= ~PHY_REFCLK_USE_PAD; > + /* USE_PAD is required only for ipq806x */ > + if (!of_device_is_compatible(node, "qcom,pcie-apq8064")) > + val &= ~PHY_REFCLK_USE_PAD; > val |= PHY_REFCLK_SSP_EN; > writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); > > -- > 2.27.0 >
Thanks for the patch! On 10/19/20 7:55 PM, Ansuel Smith wrote: > The use of PHY_REFCLK_USE_PAD introduced a regression for apq8064 > devices. It was tested that while apq doesn't require the padding, ipq > SoC must use it or the kernel hangs on boot. > > Fixes: de3c4bf6489 ("PCI: qcom: Add support for tx term offset for rev 2.1.0") > Reported-by: Ilia Mirkin <imirkin@alum.mit.edu> > Signed-off-by: Ilia Mirkin <imirkin@alum.mit.edu> > Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com> > Cc: stable@vger.kernel.org # v4.19+ Acked-by: Stanimir Varbanov <svarbanov@mm-sol.com> > --- > drivers/pci/controller/dwc/pcie-qcom.c | 4 +++- > 1 file changed, 3 insertions(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c > index 3aac77a295ba..dad6e9ce66ba 100644 > --- a/drivers/pci/controller/dwc/pcie-qcom.c > +++ b/drivers/pci/controller/dwc/pcie-qcom.c > @@ -387,7 +387,9 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) > > /* enable external reference clock */ > val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); > - val &= ~PHY_REFCLK_USE_PAD; > + /* USE_PAD is required only for ipq806x */ > + if (!of_device_is_compatible(node, "qcom,pcie-apq8064")) > + val &= ~PHY_REFCLK_USE_PAD; > val |= PHY_REFCLK_SSP_EN; > writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK); > >
On Mon, 19 Oct 2020 18:55:55 +0200, Ansuel Smith wrote: > The use of PHY_REFCLK_USE_PAD introduced a regression for apq8064 > devices. It was tested that while apq doesn't require the padding, ipq > SoC must use it or the kernel hangs on boot. Applied to pci/dwc, thanks! [1/1] PCI: qcom: use PHY_REFCLK_USE_PAD only for ipq8064 https://git.kernel.org/lpieralisi/pci/c/cef11c377a Thanks, Lorenzo
diff --git a/drivers/pci/controller/dwc/pcie-qcom.c b/drivers/pci/controller/dwc/pcie-qcom.c index 3aac77a295ba..dad6e9ce66ba 100644 --- a/drivers/pci/controller/dwc/pcie-qcom.c +++ b/drivers/pci/controller/dwc/pcie-qcom.c @@ -387,7 +387,9 @@ static int qcom_pcie_init_2_1_0(struct qcom_pcie *pcie) /* enable external reference clock */ val = readl(pcie->parf + PCIE20_PARF_PHY_REFCLK); - val &= ~PHY_REFCLK_USE_PAD; + /* USE_PAD is required only for ipq806x */ + if (!of_device_is_compatible(node, "qcom,pcie-apq8064")) + val &= ~PHY_REFCLK_USE_PAD; val |= PHY_REFCLK_SSP_EN; writel(val, pcie->parf + PCIE20_PARF_PHY_REFCLK);