From patchwork Mon Nov 30 21:11:39 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jim Quinlan X-Patchwork-Id: 11941333 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-20.1 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER,INCLUDES_PATCH,MAILING_LIST_MULTI,MIME_HEADER_CTYPE_ONLY, SPF_HELO_NONE,SPF_PASS,T_TVD_MIME_NO_HEADERS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0A99CC64E7B for ; Mon, 30 Nov 2020 21:13:35 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id A61DC2073C for ; Mon, 30 Nov 2020 21:13:34 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=broadcom.com header.i=@broadcom.com header.b="fTzmEsyj" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388361AbgK3VNR (ORCPT ); Mon, 30 Nov 2020 16:13:17 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2387806AbgK3VNQ (ORCPT ); Mon, 30 Nov 2020 16:13:16 -0500 Received: from mail-pg1-x542.google.com (mail-pg1-x542.google.com [IPv6:2607:f8b0:4864:20::542]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D7F63C061A04 for ; Mon, 30 Nov 2020 13:12:01 -0800 (PST) Received: by mail-pg1-x542.google.com with SMTP id q3so3116283pgr.3 for ; Mon, 30 Nov 2020 13:12:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=N+dv1puWjuuHFk1vB/1bZGWJVxjJ3xtSrAAsl7L7E0U=; b=fTzmEsyjjZMbE69z4iIFel5mrlfwBUwdQNpCm6FxrpslxxJaiH+Lgi86cpk0GHo36F dKahKC/Z6liuxmrXptNjY81P4YQTu2QFVCqjgVFFankzWtJjjyfDbza6hc6NUfDrE5k3 5nD7Ux5lRYZ1X3z2r5CUgPBYl6ue2eKG6aSSM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=N+dv1puWjuuHFk1vB/1bZGWJVxjJ3xtSrAAsl7L7E0U=; b=XHlVbFjwQllXQ6Dws2/RbBCVsWyiSuNLJ7ES3bDqLU7+o2004UhDmCFGsoMKnhpMXN prFbqDz+Oq+JcUzp0aiCq8ApKOumqDqQXkmHaVvt1y8w5V3M0rgn6LaoEalhc2GJPkU3 5j+c0N7D2Q+Y/5zTjrhde6uLdivty7gUYntYPxtNqz8x4P8k+M36BaWtV8x/gBGMeSL7 r/kReExQ5//fvArec5XD4af+J/LukTIBw7wMZM03RWfraYEzsZCs1vS/Nrlnbe5HWyvy Nq6OfMOXtweDv8/X+GR0O5EgUGzl5EJFk5yj0NouwlXQxa0VoJjR408prXxRwPTa42db 3s6Q== X-Gm-Message-State: AOAM532JR/t5Sq4Yg1egaH9MUNBLZtqZWconNvUNyp+wwWQu8CYOLcBs 4AbrC4xGTX9Sbl/eadyEO5gJ8OvWgEHko07EP/KWQoVTPZclU8K8d57eDlz31NNnH1U3prGGT1D PFkeNsn0f5peJ2A43Py8x44Kb+wlD9VCYSv3Q7/hMRML7EaOtLJ2ZojQJFpqWYiESRe39+//m0i dUj6jZ X-Google-Smtp-Source: ABdhPJyHBCo7iM248BtvpqWTbsJ0GkYgf/jABwj6sSm8Vv9BQUDHDXCYGUikE3aZ3W10dMjC8J8+ZQ== X-Received: by 2002:a63:1d55:: with SMTP id d21mr19699914pgm.324.1606770720817; Mon, 30 Nov 2020 13:12:00 -0800 (PST) Received: from stbsrv-and-01.and.broadcom.net ([192.19.231.250]) by smtp.gmail.com with ESMTPSA id m7sm18320441pfh.72.2020.11.30.13.11.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Nov 2020 13:12:00 -0800 (PST) From: Jim Quinlan To: linux-pci@vger.kernel.org, Nicolas Saenz Julienne , broonie@kernel.org, bcm-kernel-feedback-list@broadcom.com, james.quinlan@broadcom.com Cc: Lorenzo Pieralisi , Rob Herring , Bjorn Helgaas , Florian Fainelli , linux-rpi-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM2711/BCM2835 ARM ARCHITECTURE), linux-kernel@vger.kernel.org (open list) Subject: [PATCH v2 2/6] PCI: brcmstb: Add control of EP voltage regulator(s) Date: Mon, 30 Nov 2020 16:11:39 -0500 Message-Id: <20201130211145.3012-3-james.quinlan@broadcom.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20201130211145.3012-1-james.quinlan@broadcom.com> References: <20201130211145.3012-1-james.quinlan@broadcom.com> Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Control of EP regulators by the RC is needed because of the chicken-and-egg situation: although the regulator is "owned" by the EP and would be best handled on its driver, the EP cannot be discovered and probed unless its regulator is already turned on. Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 38 ++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c index bea86899bd5d..9d4ac42b3bee 100644 --- a/drivers/pci/controller/pcie-brcmstb.c +++ b/drivers/pci/controller/pcie-brcmstb.c @@ -23,6 +23,7 @@ #include #include #include +#include #include #include #include @@ -210,6 +211,10 @@ enum pcie_type { BCM2711, }; +static const char * const ep_regulator_names[] = { + "vpcie12v", "vpcie3v3", "vpcie1v8", "vpcie0v9", +}; + struct pcie_cfg_data { const int *offsets; const enum pcie_type type; @@ -287,8 +292,25 @@ struct brcm_pcie { u32 hw_rev; void (*perst_set)(struct brcm_pcie *pcie, u32 val); void (*bridge_sw_init_set)(struct brcm_pcie *pcie, u32 val); + struct regulator_bulk_data supplies[ARRAY_SIZE(ep_regulator_names)]; }; +static void brcm_set_regulators(struct brcm_pcie *pcie, bool on) +{ + struct device *dev = pcie->dev; + int ret; + + if (on) + ret = regulator_bulk_enable(ARRAY_SIZE(ep_regulator_names), + pcie->supplies); + else + ret = regulator_bulk_disable(ARRAY_SIZE(ep_regulator_names), + pcie->supplies); + if (ret) + dev_err(dev, "failed to %s EP regulators\n", + on ? "enable" : "disable"); +} + /* * This is to convert the size of the inbound "BAR" region to the * non-linear values of PCIE_X_MISC_RC_BAR[123]_CONFIG_LO.SIZE @@ -1139,6 +1161,7 @@ static int brcm_pcie_suspend(struct device *dev) brcm_pcie_turn_off(pcie); ret = brcm_phy_stop(pcie); clk_disable_unprepare(pcie->clk); + brcm_set_regulators(pcie, false); return ret; } @@ -1151,6 +1174,7 @@ static int brcm_pcie_resume(struct device *dev) int ret; base = pcie->base; + brcm_set_regulators(pcie, true); clk_prepare_enable(pcie->clk); ret = brcm_phy_start(pcie); @@ -1189,6 +1213,7 @@ static void __brcm_pcie_remove(struct brcm_pcie *pcie) brcm_phy_stop(pcie); reset_control_assert(pcie->rescal); clk_disable_unprepare(pcie->clk); + brcm_set_regulators(pcie, false); } static int brcm_pcie_remove(struct platform_device *pdev) @@ -1218,7 +1243,7 @@ static int brcm_pcie_probe(struct platform_device *pdev) struct pci_host_bridge *bridge; const struct pcie_cfg_data *data; struct brcm_pcie *pcie; - int ret; + int ret, i; bridge = devm_pci_alloc_host_bridge(&pdev->dev, sizeof(*pcie)); if (!bridge) @@ -1246,6 +1271,16 @@ static int brcm_pcie_probe(struct platform_device *pdev) if (IS_ERR(pcie->clk)) return PTR_ERR(pcie->clk); + for (i = 0; i < ARRAY_SIZE(ep_regulator_names); i++) + pcie->supplies[i].supply = ep_regulator_names[i]; + + ret = devm_regulator_bulk_get(pcie->dev, ARRAY_SIZE(ep_regulator_names), + pcie->supplies); + if (ret) { + dev_err(pcie->dev, "failed to get regulators\n"); + return ret; + } + ret = of_pci_get_max_link_speed(np); pcie->gen = (ret < 0) ? 0 : ret; @@ -1273,6 +1308,7 @@ static int brcm_pcie_probe(struct platform_device *pdev) return ret; } + brcm_set_regulators(pcie, true); ret = brcm_pcie_setup(pcie); if (ret) goto fail;