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Thu, 7 Jan 2021 17:50:53 +0000 From: Nirmoy Das To: bhelgaas@google.com Cc: ckoenig.leichtzumerken@gmail.com, linux-pci@vger.kernel.org, dri-devel@lists.freedesktop.org, devspam@moreofthesa.me.uk, Nirmoy Das , =?utf-8?q?Christian_K=C3=B6nig?= , kernel test robot , Dan Carpenter Subject: [PATCH 4/4] PCI: Add a REBAR size quirk for Sapphire RX 5600 XT Pulse Date: Thu, 7 Jan 2021 18:50:17 +0100 Message-Id: <20210107175017.15893-5-nirmoy.das@amd.com> X-Mailer: git-send-email 2.29.2 In-Reply-To: <20210107175017.15893-1-nirmoy.das@amd.com> References: <20210107175017.15893-1-nirmoy.das@amd.com> X-Originating-IP: [217.86.111.165] X-ClientProxiedBy: AM0PR03CA0093.eurprd03.prod.outlook.com (2603:10a6:208:69::34) To DM6PR12MB3916.namprd12.prod.outlook.com (2603:10b6:5:1ca::21) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from brihaspati.fritz.box (217.86.111.165) by AM0PR03CA0093.eurprd03.prod.outlook.com (2603:10a6:208:69::34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.3742.6 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: =?utf-8?q?6put+sMivubgGJf7J9TE/AaZ5yQ4dp?= =?utf-8?q?DEl7E+dj3nQROkuRN9KAQ210IQjRb33ZsR/YxgmLnEaBxzT6Eeg05q2ySCgHX8IyC?= =?utf-8?q?WD/H3E5X19GrXvz3Unkf2VMsYoLNOgfdNka0Z2YECKFcTyhmgffnWFtcxXF8k+ZJ0?= =?utf-8?q?eXVcRskGvecyPikqLUSquj1e62X0aGuv0Ygi7ECekaH3iCx9N0jWIWX5Z/kPqIZla?= =?utf-8?q?oRtbuIyPOHYQ68B9KD+pzQTW+UrPiV9Z+6jL7Gf6ubDeMZCsgJF3TyuYBwL/jJwuL?= =?utf-8?q?T0ZkJm7ynbj9Gs8Gw1aSvOdIWikXsWF9IAXsd/XLNYOC9kd9sE/n/pyzgB6if+z3s?= =?utf-8?q?AgQZ8wP6d7xIb93zpxneT3ppMjJ2H4GR//TT8/ww6jGM8XD0FBv2gWkuTDvd0WmGU?= =?utf-8?q?vZ1VNYh9+JaAoi+AQ0TL/w9odsZzm/nSnR1XpRmEcc6B30V0aeZMB31Be3nGfz2wb?= =?utf-8?q?DVhqgHuxdwAB4qvT907gIS/fMUrKFrdM8CNE6GS5FesiKtf/TQcDi1lic4lQGRYO9?= =?utf-8?q?gu7ehC7ivLvkOQr+eFFbBiWtzh4g99YJwlWCULOnScgqKsIqhbQ4Y4yZXHuow0sx2?= =?utf-8?q?rh73lLwxGMPiPyYJSbAGZHnPTGVQU/g7o0C8VEgRZvey/g2UMFsJ/bcFAzEOEcTFs?= =?utf-8?q?d/vtVFIqU5eg2qgMCTXPN2PU/BeBMDQuHDvCZjWg3TKizQX51m7kTSw9GyABHXdDA?= =?utf-8?q?t4v7Nb/gMvEVr/8SDUhAx3Ey7z0aZDoBvbbyG4ufsesuKygr02POCFSAIFwmH8KE0?= =?utf-8?q?6jKygN9Ht0294jLUKeE86a0ZHAo1bAg0ci/4LG6BISxLhcKIOZ3rB4OMOCFtsMuy2?= =?utf-8?q?QLWSNBQCLb9kvGe9YlGi1ZKAxOy96/FC8m/dtIxNZWtnRR5myEHzvWWnTRdXqCSBx?= =?utf-8?q?AZ823Y0FjNWgLFSiXPc8TeDAm8eQYzpgCmK3M6bC786Z1ZpKACsmoiJDMRKAM0Oed?= =?utf-8?q?+7LPA6k0h8S9UAp6xLy?= X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-AuthSource: DM6PR12MB3916.namprd12.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Jan 2021 17:50:53.8637 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-Network-Message-Id: 6963acd3-640f-4aa5-d02f-08d8b334c784 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: fHVbAVxDIg4R1MvrgQZwjAMxiMiw2VDOpH6+8oIzRYQlxYlNfx67AkJ+ENvasg0R9VJVAb3v2+0pfOd5RWQP+g== X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR12MB3066 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org RX 5600 XT Pulse advertises support for BAR0 being 256MB, 512MB, or 1GB, but it also supports 2GB, 4GB, and 8GB. Add a rebar size quirk so that CPU can fully access the BAR0. Signed-off-by: Christian König Reported-by: kernel test robot Reported-by: Dan Carpenter Signed-off-by: Nirmoy Das Acked-by: Bjorn Helgaas --- drivers/pci/pci.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 16216186b51c..b061bbd4afb1 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -3577,7 +3577,14 @@ u32 pci_rebar_get_possible_sizes(struct pci_dev *pdev, int bar) return 0; pci_read_config_dword(pdev, pos + PCI_REBAR_CAP, &cap); - return (cap & PCI_REBAR_CAP_SIZES) >> 4; + cap = (cap & PCI_REBAR_CAP_SIZES) >> 4; + + /* Sapphire RX 5600 XT Pulse has an invalid cap dword for BAR 0 */ + if (pdev->vendor == PCI_VENDOR_ID_ATI && pdev->device == 0x731f && + bar == 0 && cap == 0x700) + cap = 0x3f00; + + return cap; } EXPORT_SYMBOL(pci_rebar_get_possible_sizes);