Message ID | 20210606082204.14222-3-omp@nvidia.com (mailing list archive) |
---|---|
State | Superseded |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | Update pcie-tegra194 driver | expand |
Acked-by: Vidya Sagar <vidyas@nvidia.com> On 6/6/2021 1:52 PM, Om Prakash Singh wrote: > Lower order MSI-X address is programmed in MSIX_ADDR_MATCH_HIGH_OFF > DBI register instead of higher order address. This patch fixes this > programming mistake. > > Signed-off-by: Om Prakash Singh <omp@nvidia.com> > --- > > Changes in V2: > - No change > > drivers/pci/controller/dwc/pcie-tegra194.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c > index 6f388523bffe..66e00b276cd3 100644 > --- a/drivers/pci/controller/dwc/pcie-tegra194.c > +++ b/drivers/pci/controller/dwc/pcie-tegra194.c > @@ -1863,7 +1863,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) > val = (ep->msi_mem_phys & MSIX_ADDR_MATCH_LOW_OFF_MASK); > val |= MSIX_ADDR_MATCH_LOW_OFF_EN; > dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_LOW_OFF, val); > - val = (lower_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); > + val = (upper_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); > dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val); > > ret = dw_pcie_ep_init_complete(ep); >
diff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c index 6f388523bffe..66e00b276cd3 100644 --- a/drivers/pci/controller/dwc/pcie-tegra194.c +++ b/drivers/pci/controller/dwc/pcie-tegra194.c @@ -1863,7 +1863,7 @@ static void pex_ep_event_pex_rst_deassert(struct tegra_pcie_dw *pcie) val = (ep->msi_mem_phys & MSIX_ADDR_MATCH_LOW_OFF_MASK); val |= MSIX_ADDR_MATCH_LOW_OFF_EN; dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_LOW_OFF, val); - val = (lower_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); + val = (upper_32_bits(ep->msi_mem_phys) & MSIX_ADDR_MATCH_HIGH_OFF_MASK); dw_pcie_writel_dbi(pci, MSIX_ADDR_MATCH_HIGH_OFF, val); ret = dw_pcie_ep_init_complete(ep);
Lower order MSI-X address is programmed in MSIX_ADDR_MATCH_HIGH_OFF DBI register instead of higher order address. This patch fixes this programming mistake. Signed-off-by: Om Prakash Singh <omp@nvidia.com> --- Changes in V2: - No change drivers/pci/controller/dwc/pcie-tegra194.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)