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[122.211.248.161]) by smtp.gmail.com with ESMTPSA id d23sm1725619pjz.15.2021.06.07.04.29.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 07 Jun 2021 04:29:18 -0700 (PDT) From: Punit Agrawal To: helgaas@kernel.org, robh+dt@kernel.org Cc: Punit Agrawal , linux-rockchip@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pci@vger.kernel.org, alexandru.elisei@arm.com, wqu@suse.com, robin.murphy@arm.com, pgwipeout@gmail.com, ardb@kernel.org, briannorris@chromium.org, shawn.lin@rock-chips.com, Vidya Sagar Subject: [PATCH v3 3/4] PCI: of: Refactor the check for non-prefetchable 32-bit window Date: Mon, 7 Jun 2021 20:28:55 +0900 Message-Id: <20210607112856.3499682-4-punitagrawal@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210607112856.3499682-1-punitagrawal@gmail.com> References: <20210607112856.3499682-1-punitagrawal@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Recently, an override was added for non-prefetchable host bridge windows below 4GB that have the 64-bit address attribute set. As many of the conditions for the check overlap with the check for non-prefetchable window size, refactor the code to unify the ranges validation into devm_of_pci_get_host_bridge_resources(). As an added benefit, the warning message is now printed right after the range mapping giving the user a better indication of where the issue is. Signed-off-by: Punit Agrawal Tested-by: Alexandru Elisei Cc: Vidya Sagar --- drivers/pci/of.c | 12 +++++------- 1 file changed, 5 insertions(+), 7 deletions(-) diff --git a/drivers/pci/of.c b/drivers/pci/of.c index 38fe2589beb0..0580c654127e 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -355,11 +355,15 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev, *io_base = range.cpu_addr; } else if (resource_type(res) == IORESOURCE_MEM) { if (!(res->flags & IORESOURCE_PREFETCH)) { - if (res->flags & IORESOURCE_MEM_64) + if (res->flags & IORESOURCE_MEM_64) { if (!upper_32_bits(range.pci_addr + range.size - 1)) { dev_warn(dev, "Clearing 64-bit flag for non-prefetchable memory below 4GB\n"); res->flags &= ~IORESOURCE_MEM_64; } + } else { + if (upper_32_bits(resource_size(res))) + dev_warn(dev, "Memory resource size exceeds max for 32 bits\n"); + } } } @@ -579,12 +583,6 @@ static int pci_parse_request_of_pci_ranges(struct device *dev, break; case IORESOURCE_MEM: res_valid |= !(res->flags & IORESOURCE_PREFETCH); - - if (!(res->flags & IORESOURCE_PREFETCH)) - if (!(res->flags & IORESOURCE_MEM_64) && - upper_32_bits(resource_size(res))) - dev_warn(dev, "Memory resource size exceeds max for 32 bits\n"); - break; } }