| Message ID | 20210802155644.3089929-1-wasim.khan@oss.nxp.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Delegated to: | Bjorn Helgaas |
| Headers | show |
| Series | [v2] PCI: Add ACS quirk for NXP LX2160 and LX2162 C/E/N platforms | expand |
On Mon, Aug 02, 2021 at 05:56:44PM +0200, Wasim Khan wrote: > From: Wasim Khan <wasim.khan@nxp.com> > > LX2160C : security features + CAN-FD > LX2160E : security features + CAN > LX2160N : without security features + CAN > LX2162C : security features + CAN-FD > LX2162E : security features + CAN > LX2162N : without security features + CAN Can you associate these with the device IDs, please? Ideally a one-line comment in the code, but if that doesn't fit nicely, at least include the device ID for each here in the commit log. > Root Ports in NXP LX2160 and LX2162 where each Root Port > is a Root Complex with unique segment numbers do provide > isolation features to disable peer transactions and > validate bus numbers in requests, but do not provide an > actual PCIe ACS capability. > > Enable ACS quirk for NXP LX2160C/E/N and LX2162C/E/N platforms > > Signed-off-by: Wasim Khan <wasim.khan@nxp.com> > --- > Changes in v2: > - removed duplicate entry of 0x8d80 and 0x8d88 > > drivers/pci/quirks.c | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c > index 24343a76c034..1ad158066d39 100644 > --- a/drivers/pci/quirks.c > +++ b/drivers/pci/quirks.c > @@ -4787,6 +4787,23 @@ static const struct pci_dev_acs_enabled { > { PCI_VENDOR_ID_NXP, 0x8d80, pci_quirk_nxp_rp_acs }, > { PCI_VENDOR_ID_NXP, 0x8d88, pci_quirk_nxp_rp_acs }, > { PCI_VENDOR_ID_NXP, 0x8d89, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d90, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d91, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8da1, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8db0, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d92, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d82, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d93, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8da0, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8db1, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d99, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d8a, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d9b, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8da8, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8db9, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d98, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8db8, pci_quirk_nxp_rp_acs }, > + { PCI_VENDOR_ID_NXP, 0x8d9a, pci_quirk_nxp_rp_acs }, Sort these in order of device ID so it's easier to see duplicates and to find the one you're looking for. > /* Zhaoxin Root/Downstream Ports */ > { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, > { 0 } > -- > 2.25.1 >
> -----Original Message----- > From: Bjorn Helgaas <helgaas@kernel.org> > Sent: Monday, August 2, 2021 9:35 PM > To: Wasim Khan (OSS) <wasim.khan@oss.nxp.com> > Cc: bhelgaas@google.com; linux-pci@vger.kernel.org; linux- > kernel@vger.kernel.org; Varun Sethi <V.Sethi@nxp.com>; Wasim Khan > <wasim.khan@nxp.com> > Subject: Re: [PATCH v2] PCI: Add ACS quirk for NXP LX2160 and LX2162 C/E/N > platforms > > On Mon, Aug 02, 2021 at 05:56:44PM +0200, Wasim Khan wrote: > > From: Wasim Khan <wasim.khan@nxp.com> > > > > LX2160C : security features + CAN-FD > > LX2160E : security features + CAN > > LX2160N : without security features + CAN LX2162C : security features > > + CAN-FD LX2162E : security features + CAN LX2162N : without security > > features + CAN > > Can you associate these with the device IDs, please? Ideally a one-line > comment in the code, but if that doesn't fit nicely, at least include the device > ID for each here in the commit log. Thank you for the review. Sure, I will associate them with device IDs and send updated version. > > > Root Ports in NXP LX2160 and LX2162 where each Root Port is a Root > > Complex with unique segment numbers do provide isolation features to > > disable peer transactions and validate bus numbers in requests, but do > > not provide an actual PCIe ACS capability. > > > > Enable ACS quirk for NXP LX2160C/E/N and LX2162C/E/N platforms > > > > Signed-off-by: Wasim Khan <wasim.khan@nxp.com> > > --- > > Changes in v2: > > - removed duplicate entry of 0x8d80 and 0x8d88 > > > > drivers/pci/quirks.c | 17 +++++++++++++++++ > > 1 file changed, 17 insertions(+) > > > > diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index > > 24343a76c034..1ad158066d39 100644 > > --- a/drivers/pci/quirks.c > > +++ b/drivers/pci/quirks.c > > @@ -4787,6 +4787,23 @@ static const struct pci_dev_acs_enabled { > > { PCI_VENDOR_ID_NXP, 0x8d80, pci_quirk_nxp_rp_acs }, > > { PCI_VENDOR_ID_NXP, 0x8d88, pci_quirk_nxp_rp_acs }, > > { PCI_VENDOR_ID_NXP, 0x8d89, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d90, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d91, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8da1, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8db0, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d92, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d82, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d93, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8da0, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8db1, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d99, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d8a, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d9b, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8da8, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8db9, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d98, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8db8, pci_quirk_nxp_rp_acs }, > > + { PCI_VENDOR_ID_NXP, 0x8d9a, pci_quirk_nxp_rp_acs }, > > Sort these in order of device ID so it's easier to see duplicates and to find the > one you're looking for. > > > /* Zhaoxin Root/Downstream Ports */ > > { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, > pci_quirk_zhaoxin_pcie_ports_acs }, > > { 0 } > > -- > > 2.25.1 > >
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 24343a76c034..1ad158066d39 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c @@ -4787,6 +4787,23 @@ static const struct pci_dev_acs_enabled { { PCI_VENDOR_ID_NXP, 0x8d80, pci_quirk_nxp_rp_acs }, { PCI_VENDOR_ID_NXP, 0x8d88, pci_quirk_nxp_rp_acs }, { PCI_VENDOR_ID_NXP, 0x8d89, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d90, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d91, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8da1, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8db0, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d92, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d82, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d93, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8da0, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8db1, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d99, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d8a, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d9b, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8da8, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8db9, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d98, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8db8, pci_quirk_nxp_rp_acs }, + { PCI_VENDOR_ID_NXP, 0x8d9a, pci_quirk_nxp_rp_acs }, /* Zhaoxin Root/Downstream Ports */ { PCI_VENDOR_ID_ZHAOXIN, PCI_ANY_ID, pci_quirk_zhaoxin_pcie_ports_acs }, { 0 }