From patchwork Mon Aug 16 03:16:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alyssa Rosenzweig X-Patchwork-Id: 12437655 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2696FC4320E for ; Mon, 16 Aug 2021 03:17:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 126DB6152A for ; Mon, 16 Aug 2021 03:17:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232918AbhHPDSO (ORCPT ); Sun, 15 Aug 2021 23:18:14 -0400 Received: from [138.197.143.207] ([138.197.143.207]:45246 "EHLO rosenzweig.io" rhost-flags-FAIL-FAIL-OK-OK) by vger.kernel.org with ESMTP id S232875AbhHPDSN (ORCPT ); Sun, 15 Aug 2021 23:18:13 -0400 From: Alyssa Rosenzweig To: linux-pci@vger.kernel.org Cc: Bjorn Helgaas , Rob Herring , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Alyssa Rosenzweig , Stan Skowronek , Marc Zyngier , Mark Kettenis , Sven Peter , Hector Martin , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 5/6] arm64: apple: Add pinctrl nodes Date: Sun, 15 Aug 2021 23:16:20 -0400 Message-Id: <20210816031621.240268-6-alyssa@rosenzweig.io> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210816031621.240268-1-alyssa@rosenzweig.io> References: <20210816031621.240268-1-alyssa@rosenzweig.io> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Mark Kettenis Add pinctrl nodes corresponding to the gpio,t8101 nodes in the Apple device tree for the Mac mini (M1, 2020). Clock references are left out at the moment and will be added once the appropriate bindings have been settled upon. Signed-off-by: Mark Kettenis --- arch/arm64/boot/dts/apple/t8103.dtsi | 83 ++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index a1e22a2ea2e5..342e01c6098e 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -9,6 +9,7 @@ #include #include +#include / { compatible = "apple,t8103", "apple,arm-platform"; @@ -131,5 +132,87 @@ aic: interrupt-controller@23b100000 { interrupt-controller; reg = <0x2 0x3b100000 0x0 0x8000>; }; + + pinctrl_ap: pinctrl@23c100000 { + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; + reg = <0x2 0x3c100000 0x0 0x100000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_ap 0 0 212>; + + interrupt-controller; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + + pcie_pins: pcie-pins { + pinmux = , + , + ; + }; + }; + + pinctrl_nub: pinctrl@23d1f0000 { + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; + reg = <0x2 0x3d1f0000 0x0 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_nub 0 0 23>; + + interrupt-controller; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + }; + + pinctrl_smc: pinctrl@23e820000 { + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; + reg = <0x2 0x3e820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_smc 0 0 16>; + + interrupt-controller; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + }; + + pinctrl_aop: pinctrl@24a820000 { + compatible = "apple,t8103-pinctrl", "apple,pinctrl"; + reg = <0x2 0x4a820000 0x0 0x4000>; + + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pinctrl_aop 0 0 42>; + + interrupt-controller; + interrupt-parent = <&aic>; + interrupts = , + , + , + , + , + , + ; + }; }; };