From patchwork Fri Aug 20 02:35:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Smlhbmp1biBXYW5nICjnjovlu7rlhpsp?= X-Patchwork-Id: 12448265 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,UNPARSEABLE_RELAY,URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3011FC4320A for ; Fri, 20 Aug 2021 02:35:30 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 10564610D2 for ; Fri, 20 Aug 2021 02:35:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237636AbhHTCgG (ORCPT ); Thu, 19 Aug 2021 22:36:06 -0400 Received: from mailgw01.mediatek.com ([60.244.123.138]:37222 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S237269AbhHTCgF (ORCPT ); Thu, 19 Aug 2021 22:36:05 -0400 X-UUID: 0c8fbe722d974c54b467120459fd7fa9-20210820 X-UUID: 0c8fbe722d974c54b467120459fd7fa9-20210820 Received: from mtkexhb02.mediatek.inc [(172.21.101.103)] by mailgw01.mediatek.com (envelope-from ) (Generic MTA with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 2033063789; Fri, 20 Aug 2021 10:35:25 +0800 Received: from mtkcas10.mediatek.inc (172.21.101.39) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 20 Aug 2021 10:35:24 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas10.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 20 Aug 2021 10:35:22 +0800 From: Jianjun Wang To: Rob Herring , Bjorn Helgaas , Matthias Brugger , Ryder Lee CC: , , , , , Jianjun Wang , , Subject: [PATCH] dt-bindings: PCI: mediatek-gen3: Add support for MT8195 Date: Fri, 20 Aug 2021 10:35:21 +0800 Message-ID: <20210820023521.30716-1-jianjun.wang@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org MT8195 is an ARM platform SoC which has the same PCIe IP with MT8192. Signed-off-by: Jianjun Wang --- Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 742206dbd965..dcebb1036207 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -48,7 +48,9 @@ allOf: properties: compatible: - const: mediatek,mt8192-pcie + oneOf: + - const: mediatek,mt8192-pcie + - const: mediatek,mt8195-pcie reg: maxItems: 1