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Sat, 21 Aug 2021 13:31:47 +0000 Received: from DRHQMAIL107.nvidia.com (10.27.9.16) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 21 Aug 2021 06:31:46 -0700 Received: from SDONTHINENI-DESKTOP.nvidia.com (172.20.187.6) by DRHQMAIL107.nvidia.com (10.27.9.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 21 Aug 2021 13:31:44 +0000 From: Shanker Donthineni To: Bjorn Helgaas CC: Alex Williamson , , , , "Oliver O'Halloran" , Russell Currey , "Shanker Donthineni" Subject: [PATCH] PCI/AER: Continue AER recovery of device with NO_BUS_RESET set Date: Sat, 21 Aug 2021 08:30:58 -0500 Message-ID: <20210821133058.31583-1-sdonthineni@nvidia.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [172.20.187.6] X-ClientProxiedBy: HQMAIL107.nvidia.com (172.20.187.13) To DRHQMAIL107.nvidia.com (10.27.9.16) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 220c93d7-ec84-40d6-5c0e-08d964a80649 X-MS-TrafficTypeDiagnostic: CY4PR1201MB0229: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:4303; 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X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Aug 2021 13:31:47.1270 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 220c93d7-ec84-40d6-5c0e-08d964a80649 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.112.32];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT066.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1201MB0229 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org In the current implementation, the AER FATAL and NONFTAL recovery will be terminated for the device that exhibits NO_BUS_RESET quirk. The non-zero return value from pci_bus_error_reset() is treated as an error condition in aer_root_reset() which leads to return PCI_ERS_RESULT_DISCONNECT. aer_recover_work_func() pcie_do_recovery() report_frozen_detected() if (aer_root_reset() == PCI_ERS_RESULT_DISCONNECT) goto failed # termimates here because of NO_BUS_RESET ... report_mmio_enabled() report_resume() pcie_clear_xxx_status() ... return 0 failed: pci_uevent_ers(PCI_ERS_RESULT_DISCONNECT); The return value -ENOTTY from pci_bus_error_reset() indicates SBR was skipped but no real errors were encountered. This scenario could be considered as a non-error case so that the PCI device driver gets the opportunity to recover the device back to an operational state instead of keeping it in the DISCONNECT state. Signed-off-by: Shanker Donthineni --- drivers/pci/pcie/aer.c | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/pci/pcie/aer.c b/drivers/pci/pcie/aer.c index 9784fdcf30061..8cf6bd6a3376d 100644 --- a/drivers/pci/pcie/aer.c +++ b/drivers/pci/pcie/aer.c @@ -1414,8 +1414,12 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) pci_info(dev, "not reset (no FLR support: %d)\n", rc); } else { rc = pci_bus_error_reset(dev); - pci_info(dev, "%s Port link has been reset (%d)\n", - pci_is_root_bus(dev->bus) ? "Root" : "Downstream", rc); + pci_info(dev, "%s Port link has %sbeen reset (%d)\n", + pci_is_root_bus(dev->bus) ? "Root" : "Downstream", + rc == -ENOTTY ? "not " : "", rc); + + if (rc == -ENOTTY) + rc = 0; } if ((host->native_aer || pcie_ports_native) && aer) {