From patchwork Tue Oct 5 18:09:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 12537455 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48290C433EF for ; Tue, 5 Oct 2021 18:10:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2BC8561401 for ; Tue, 5 Oct 2021 18:10:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234217AbhJESLv (ORCPT ); Tue, 5 Oct 2021 14:11:51 -0400 Received: from mail.kernel.org ([198.145.29.99]:39088 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233472AbhJESLt (ORCPT ); Tue, 5 Oct 2021 14:11:49 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id B0E3F613D5; Tue, 5 Oct 2021 18:09:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1633457398; bh=/0Z/2LEocX5fVRWMKbSKvxT+YnIkYZ2PlxsVs//25oA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=opZq28pLvtMm7rl0RkZWDJseOZnnAPUxhINlXozqjZXt19hjfN1GgZBhjKD0DvvzJ bpQZ159u8bUbO2kdOjAPQUbWlM1YDVHCpznqflubFxsPoVjDlPP1mrHgNGy38y8Syn rDXlLtA3h6JCKiZBxW7tVg75eHe0gl1vyaG9tIL8X5Ns8bn8FRRxr6svawV+h3vmEk OGafuBi1fQYDGpuJwh27J4MtQkpFNnC0suwnq04pvUQKHnLi6JSBPOPaeENmiBA6Tk OxbAKzHfrL+XkuT2zgdmhvgz43ssCpmbIguHVEbOoCqzjn5RZuDeA/msDUGoMNXTmz MwkKL5bQ9NKmw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Lorenzo Pieralisi Cc: Bjorn Helgaas , linux-pci@vger.kernel.org, pali@kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 02/13] PCI: aardvark: Fix PCIe Max Payload Size setting Date: Tue, 5 Oct 2021 20:09:41 +0200 Message-Id: <20211005180952.6812-3-kabel@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20211005180952.6812-1-kabel@kernel.org> References: <20211005180952.6812-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Pali Rohár Change PCIe Max Payload Size setting in PCIe Device Control register to 512 bytes to align with PCIe Link Initialization sequence as defined in Marvell Armada 3700 Functional Specification. According to the specification, maximal Max Payload Size supported by this device is 512 bytes. Without this kernel prints suspicious line: pci 0000:01:00.0: Upstream bridge's Max Payload Size set to 256 (was 16384, max 512) With this change it changes to: pci 0000:01:00.0: Upstream bridge's Max Payload Size set to 256 (was 512, max 512) Fixes: 8c39d710363c ("PCI: aardvark: Add Aardvark PCI host controller driver") Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Signed-off-by: Marek Behún Cc: stable@vger.kernel.org --- drivers/pci/controller/pci-aardvark.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 596ebcfcc82d..884510630bae 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -488,8 +488,9 @@ static void advk_pcie_setup_hw(struct advk_pcie *pcie) reg = advk_readl(pcie, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL); reg &= ~PCI_EXP_DEVCTL_RELAX_EN; reg &= ~PCI_EXP_DEVCTL_NOSNOOP_EN; + reg &= ~PCI_EXP_DEVCTL_PAYLOAD; reg &= ~PCI_EXP_DEVCTL_READRQ; - reg |= PCI_EXP_DEVCTL_PAYLOAD; /* Set max payload size */ + reg |= PCI_EXP_DEVCTL_PAYLOAD_512B; reg |= PCI_EXP_DEVCTL_READRQ_512B; advk_writel(pcie, reg, PCIE_CORE_PCIEXP_CAP + PCI_EXP_DEVCTL);