| Message ID | 20211207053458.17777-1-marcan@marcan.st (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 111659c2a570ab1d62615040249dd37f39034d68 |
| Delegated to: | Rob Herring |
| Headers | show |
| Series | arm64: dts: apple: t8103: Remove PCIe max-link-speed properties | expand |
On Tue, 07 Dec 2021 05:34:58 +0000, Hector Martin <marcan@marcan.st> wrote: > > The driver doesn't support these, they shouldn't be in the SoC include > anyway, and we're now configuring this in the bootloader instead. This > also solves the j274 1G/10G Ethernet variant discrepancy, since that > will now be configured properly based on the dynamic ADT property. > > Signed-off-by: Hector Martin <marcan@marcan.st> Acked-by: Marc Zyngier <maz@kernel.org> M.
diff --git a/arch/arm64/boot/dts/apple/t8103.dtsi b/arch/arm64/boot/dts/apple/t8103.dtsi index 15ee8c8c5fa0..8d1628e0b0c7 100644 --- a/arch/arm64/boot/dts/apple/t8103.dtsi +++ b/arch/arm64/boot/dts/apple/t8103.dtsi @@ -412,7 +412,6 @@ port00: pci@0,0 { device_type = "pci"; reg = <0x0 0x0 0x0 0x0 0x0>; reset-gpios = <&pinctrl_ap 152 0>; - max-link-speed = <2>; #address-cells = <3>; #size-cells = <2>; @@ -432,7 +431,6 @@ port01: pci@1,0 { device_type = "pci"; reg = <0x800 0x0 0x0 0x0 0x0>; reset-gpios = <&pinctrl_ap 153 0>; - max-link-speed = <2>; #address-cells = <3>; #size-cells = <2>; @@ -452,7 +450,6 @@ port02: pci@2,0 { device_type = "pci"; reg = <0x1000 0x0 0x0 0x0 0x0>; reset-gpios = <&pinctrl_ap 33 0>; - max-link-speed = <1>; #address-cells = <3>; #size-cells = <2>;
The driver doesn't support these, they shouldn't be in the SoC include anyway, and we're now configuring this in the bootloader instead. This also solves the j274 1G/10G Ethernet variant discrepancy, since that will now be configured properly based on the dynamic ADT property. Signed-off-by: Hector Martin <marcan@marcan.st> --- arch/arm64/boot/dts/apple/t8103.dtsi | 3 --- 1 file changed, 3 deletions(-)