From patchwork Mon Jan 10 01:50:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 12708092 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 91E81C433F5 for ; Mon, 10 Jan 2022 01:51:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238030AbiAJBvS (ORCPT ); Sun, 9 Jan 2022 20:51:18 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59700 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238024AbiAJBvN (ORCPT ); Sun, 9 Jan 2022 20:51:13 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 48398C06173F for ; Sun, 9 Jan 2022 17:51:13 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 1357DB8111A for ; Mon, 10 Jan 2022 01:51:12 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 51EE9C36AF6; Mon, 10 Jan 2022 01:51:09 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1641779470; bh=X1/8z8rAB/tlb1Yq5h47dXJeVxei641JkvMqX1F0AAI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZU0S343hektF/Q245I0dBRq0Jj2qjjYSY0+pfz4HWbUqjq9ytEmTYfyDdBQBKmYW0 ZFATENkrvyagnNg3KHcTd1vQkXFbKDx/ZtbQGQRwGPfPsrxeHs7ZiQkEVK5aUvrJ6j P2u0pdt97IccmWrSHTVODr6QOPi+taV0vlAYMXeSUqDdW2Z3UhbPMydR0W8qSseSxx Zc1x1TUGEqic/VHDiTSGDjDPG5tJ0hLlGgo2rWcUybVMrp2DKB4rWnV4bN7tf9quCO OuhAcw3Scs3vFWBBKs8o4xZjOO3AptfHE6EKrWtw64/rD3S/BeN+rBnvUy3J5nX9kf 7OhJqYzn1dDtA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Marc Zyngier , Lorenzo Pieralisi , Bjorn Helgaas Cc: pali@kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v2 23/23] PCI: aardvark: Make main irq_chip structure a static driver structure Date: Mon, 10 Jan 2022 02:50:18 +0100 Message-Id: <20220110015018.26359-24-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220110015018.26359-1-kabel@kernel.org> References: <20220110015018.26359-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Marc Zyngier says [1] that we should use struct irq_chip as a global static struct in the driver. Even though the structure currently contains a dynamic member (parent_device), Marc says [2] that he plans to kill it and make the structure completely static. We have already converted others irq_chip structures in this driver in this way, but we omitted this one because the .name member is dynamically created from device's name, and the name is displayed in sysfs, so changing it would break sysfs ABI. The rationale for changing the name (to "advk-INT") in spite of sysfs ABI, and thus allowing to convert to a static structure, is that after the other changes we made in this series, the IRQ chip is basically something different: it no logner generates ERR and PME interrupts (they are generated by emulated bridge's rp_irq_chip). [1] https://lore.kernel.org/linux-pci/877dbcvngf.wl-maz@kernel.org/ [2] https://lore.kernel.org/linux-pci/874k6gvkhz.wl-maz@kernel.org/ Signed-off-by: Marek Behún --- drivers/pci/controller/pci-aardvark.c | 25 +++++++------------------ 1 file changed, 7 insertions(+), 18 deletions(-) diff --git a/drivers/pci/controller/pci-aardvark.c b/drivers/pci/controller/pci-aardvark.c index 2c5cc929b94f..087a0b22d573 100644 --- a/drivers/pci/controller/pci-aardvark.c +++ b/drivers/pci/controller/pci-aardvark.c @@ -276,7 +276,6 @@ struct advk_pcie { int irq; struct irq_domain *rp_irq_domain; struct irq_domain *irq_domain; - struct irq_chip irq_chip; raw_spinlock_t irq_lock; struct irq_domain *msi_domain; struct irq_domain *msi_inner_domain; @@ -1338,14 +1337,19 @@ static void advk_pcie_irq_unmask(struct irq_data *d) raw_spin_unlock_irqrestore(&pcie->irq_lock, flags); } +static struct irq_chip advk_irq_chip = { + .name = "advk-INT", + .irq_mask = advk_pcie_irq_mask, + .irq_unmask = advk_pcie_irq_unmask, +}; + static int advk_pcie_irq_map(struct irq_domain *h, unsigned int virq, irq_hw_number_t hwirq) { struct advk_pcie *pcie = h->host_data; irq_set_status_flags(virq, IRQ_LEVEL); - irq_set_chip_and_handler(virq, &pcie->irq_chip, - handle_level_irq); + irq_set_chip_and_handler(virq, &advk_irq_chip, handle_level_irq); irq_set_chip_data(virq, pcie); return 0; @@ -1404,7 +1408,6 @@ static int advk_pcie_init_irq_domain(struct advk_pcie *pcie) struct device *dev = &pcie->pdev->dev; struct device_node *node = dev->of_node; struct device_node *pcie_intc_node; - struct irq_chip *irq_chip; int ret = 0; raw_spin_lock_init(&pcie->irq_lock); @@ -1415,28 +1418,14 @@ static int advk_pcie_init_irq_domain(struct advk_pcie *pcie) return -ENODEV; } - irq_chip = &pcie->irq_chip; - - irq_chip->name = devm_kasprintf(dev, GFP_KERNEL, "%s-irq", - dev_name(dev)); - if (!irq_chip->name) { - ret = -ENOMEM; - goto out_put_node; - } - - irq_chip->irq_mask = advk_pcie_irq_mask; - irq_chip->irq_unmask = advk_pcie_irq_unmask; - pcie->irq_domain = irq_domain_add_linear(pcie_intc_node, PCI_NUM_INTX, &advk_pcie_irq_domain_ops, pcie); if (!pcie->irq_domain) { dev_err(dev, "Failed to get a INTx IRQ domain\n"); ret = -ENOMEM; - goto out_put_node; } -out_put_node: of_node_put(pcie_intc_node); return ret; }