From patchwork Wed Jan 12 09:42:50 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Stefan Roese X-Patchwork-Id: 12711080 X-Patchwork-Delegate: bhelgaas@google.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A8CA1C433F5 for ; Wed, 12 Jan 2022 09:43:02 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S238775AbiALJnC (ORCPT ); Wed, 12 Jan 2022 04:43:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38330 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346463AbiALJm7 (ORCPT ); Wed, 12 Jan 2022 04:42:59 -0500 Received: from mout-u-107.mailbox.org (mout-u-107.mailbox.org [IPv6:2001:67c:2050:1::465:107]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ACAD6C061751 for ; Wed, 12 Jan 2022 01:42:59 -0800 (PST) Received: from smtp202.mailbox.org (smtp202.mailbox.org [IPv6:2001:67c:2050:105:465:1:4:0]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by mout-u-107.mailbox.org (Postfix) with ESMTPS id 4JYjKY4ym1zQl5l; Wed, 12 Jan 2022 10:42:57 +0100 (CET) X-Virus-Scanned: amavisd-new at heinlein-support.de From: Stefan Roese To: linux-pci@vger.kernel.org Cc: Bharat Kumar Gogada , Bjorn Helgaas , =?utf-8?q?Pali_Roh=C3=A1r?= , Michal Simek Subject: [RESEND PATCH v2 3/4] PCI/portdrv: Check platform supported service IRQ's Date: Wed, 12 Jan 2022 10:42:50 +0100 Message-Id: <20220112094251.1271531-3-sr@denx.de> In-Reply-To: <20220112094251.1271531-1-sr@denx.de> References: <20220112094251.1271531-1-sr@denx.de> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org From: Bharat Kumar Gogada Platforms may have dedicated IRQ lines for PCIe services like AER/PME etc., check for such IRQ lines. Check if platform has any dedicated IRQ lines for PCIe services. Signed-off-by: Bharat Kumar Gogada Signed-off-by: Stefan Roese Tested-by: Stefan Roese Cc: Bjorn Helgaas Cc: Pali Rohár Cc: Michal Simek --- drivers/pci/pcie/portdrv_core.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/pci/pcie/portdrv_core.c b/drivers/pci/pcie/portdrv_core.c index bda630889f95..70dd45671ed8 100644 --- a/drivers/pci/pcie/portdrv_core.c +++ b/drivers/pci/pcie/portdrv_core.c @@ -358,6 +358,14 @@ int pcie_port_device_register(struct pci_dev *dev) } } + /* + * Some platforms have dedicated interrupt line from root complex to + * interrupt controller for PCIe services like AER/PME etc., check + * if platform registered with any such IRQ. + */ + if (pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT) + pci_check_platform_service_irqs(dev, irqs, capabilities); + /* Allocate child services if any */ status = -ENODEV; nr_service = 0;