| Message ID | 20220205162144.30240-3-vidyas@nvidia.com (mailing list archive) |
|---|---|
| State | Superseded |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | PCI: tegra: Add Tegra234 PCIe support | expand |
On Sat, 05 Feb 2022 21:51:36 +0530, Vidya Sagar wrote: > Add power domain IDs for the four PCIe power partitions found on > Tegra234. > > Signed-off-by: Vidya Sagar <vidyas@nvidia.com> > --- > .../dt-bindings/power/tegra234-powergate.h | 20 +++++++++++++++++++ > 1 file changed, 20 insertions(+) > create mode 100644 include/dt-bindings/power/tegra234-powergate.h > Acked-by: Rob Herring <robh@kernel.org>
diff --git a/include/dt-bindings/power/tegra234-powergate.h b/include/dt-bindings/power/tegra234-powergate.h new file mode 100644 index 000000000000..e989f84b24f6 --- /dev/null +++ b/include/dt-bindings/power/tegra234-powergate.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. */ + +#ifndef __ABI_MACH_T234_POWERGATE_T234_H_ +#define __ABI_MACH_T234_POWERGATE_T234_H_ + +#define TEGRA234_POWER_DOMAIN_PCIEX8A 5U +#define TEGRA234_POWER_DOMAIN_PCIEX4A 6U +#define TEGRA234_POWER_DOMAIN_PCIEX4BA 7U +#define TEGRA234_POWER_DOMAIN_PCIEX4BB 8U +#define TEGRA234_POWER_DOMAIN_PCIEX1A 9U +#define TEGRA234_POWER_DOMAIN_PCIEX4CA 13U +#define TEGRA234_POWER_DOMAIN_PCIEX4CB 14U +#define TEGRA234_POWER_DOMAIN_PCIEX4CC 15U +#define TEGRA234_POWER_DOMAIN_PCIEX8B 16U +#define TEGRA234_POWER_DOMAIN_MGBEA 17U +#define TEGRA234_POWER_DOMAIN_MGBEB 18U +#define TEGRA234_POWER_DOMAIN_MGBEC 19U + +#endif
Add power domain IDs for the four PCIe power partitions found on Tegra234. Signed-off-by: Vidya Sagar <vidyas@nvidia.com> --- .../dt-bindings/power/tegra234-powergate.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/dt-bindings/power/tegra234-powergate.h