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Sat, 5 Feb 2022 08:22:02 -0800 From: Vidya Sagar To: , , , , CC: , , , , , , , , , , , , , , Subject: [PATCH V1 02/10] dt-bindings: power: Add Tegra234 PCIe power domains Date: Sat, 5 Feb 2022 21:51:36 +0530 Message-ID: <20220205162144.30240-3-vidyas@nvidia.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220205162144.30240-1-vidyas@nvidia.com> References: <20220205162144.30240-1-vidyas@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: f9f1ecdd-13da-49bb-e278-08d9e8c3a92c X-MS-TrafficTypeDiagnostic: BY5PR12MB3922:EE_ X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:2733; X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: PfXaPpQ25gmCPWpYPpj9MLQATEMs2lGB16w6OZHjXUYJ7AD9oep2oqhySMpjtlSDjSypBbHBgztWTl4Z1fhih0S72C8dvlx9EmmvHRLkVfW4Zs/lURo6cqSR1ZyfalltxjmQ9UevrYpQW0A3TboEbicvVoWNGCw3pOa4rSQDCuflTVqG7DXfa9Q95BE33K0i1+STvdJF1A2eLp5MnSihXaDvhP5ThX7peBV31hvtI9wHtct4Fe6YhHvIMfLM7+XnOyyjIx68OI04iEIotb2Fy0BMbtKUMq89KmHGDaMtTH/qYVN1bBsxscBn7cbOGzlwIQSRjDnokQIy49bVNFo6aSj4Z002QApah0K++mC8MOvNl5/ZqWJNaQLh07ZpFBHOZAPmiRUQLhSSdngbpT4479zmxRhJaYNh3ZfqPGfJ9z9OTTxRTvLP8GWmFNd1lS4WcKvpe+BrRNHQ3hdYYiVR8KIE+nOErJLksMq6zuhESyZykvKEVMEnT2EOST2sfMKiE98GMsC8jHyeew8DPO82kEWAlV3vxe18k9bXCRHI9uhF9bSGyepEhK222zKwHto18KipsGF1cuHrha3rTGY4tCwprCT6/brXK25Vcdk2PM1TFUDUsoC6CajqViltWEMEQnlkAqwXPTwmGUKRARGvc/Uqy+H0ye5XzyjLc7sKFwIS/UlhaL6uhvfalykGYsI5QB8MQlYYOzm+gtuAvPpt0w== X-Forefront-Antispam-Report: CIP:12.22.5.234;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:mail.nvidia.com;PTR:InfoNoRecords;CAT:NONE;SFS:(13230001)(4636009)(46966006)(36840700001)(40470700004)(6636002)(316002)(110136005)(54906003)(4326008)(356005)(70586007)(70206006)(508600001)(8676002)(8936002)(81166007)(86362001)(47076005)(82310400004)(36756003)(7416002)(336012)(40460700003)(26005)(2906002)(186003)(426003)(1076003)(2616005)(36860700001)(6666004)(5660300002)(7696005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 05 Feb 2022 16:22:10.2475 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: f9f1ecdd-13da-49bb-e278-08d9e8c3a92c X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[12.22.5.234];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN8NAM11FT021.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BY5PR12MB3922 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add power domain IDs for the four PCIe power partitions found on Tegra234. Signed-off-by: Vidya Sagar Acked-by: Rob Herring --- .../dt-bindings/power/tegra234-powergate.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/dt-bindings/power/tegra234-powergate.h diff --git a/include/dt-bindings/power/tegra234-powergate.h b/include/dt-bindings/power/tegra234-powergate.h new file mode 100644 index 000000000000..e989f84b24f6 --- /dev/null +++ b/include/dt-bindings/power/tegra234-powergate.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* Copyright (c) 2022, NVIDIA CORPORATION. All rights reserved. */ + +#ifndef __ABI_MACH_T234_POWERGATE_T234_H_ +#define __ABI_MACH_T234_POWERGATE_T234_H_ + +#define TEGRA234_POWER_DOMAIN_PCIEX8A 5U +#define TEGRA234_POWER_DOMAIN_PCIEX4A 6U +#define TEGRA234_POWER_DOMAIN_PCIEX4BA 7U +#define TEGRA234_POWER_DOMAIN_PCIEX4BB 8U +#define TEGRA234_POWER_DOMAIN_PCIEX1A 9U +#define TEGRA234_POWER_DOMAIN_PCIEX4CA 13U +#define TEGRA234_POWER_DOMAIN_PCIEX4CB 14U +#define TEGRA234_POWER_DOMAIN_PCIEX4CC 15U +#define TEGRA234_POWER_DOMAIN_PCIEX8B 16U +#define TEGRA234_POWER_DOMAIN_MGBEA 17U +#define TEGRA234_POWER_DOMAIN_MGBEB 18U +#define TEGRA234_POWER_DOMAIN_MGBEC 19U + +#endif