diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index 9f5bd41bf660..577a588fe1ae 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -2656,19 +2656,6 @@ config MMCONF_FAM10H
 	def_bool y
 	depends on X86_64 && PCI_MMCONFIG && ACPI
 
-config PCI_CNB20LE_QUIRK
-	bool "Read CNB20LE Host Bridge Windows" if EXPERT
-	depends on PCI
-	help
-	  Read the PCI windows out of the CNB20LE host bridge. This allows
-	  PCI hotplug to work on systems with the CNB20LE chipset which do
-	  not have ACPI.
-
-	  There's no public spec for this chipset, and this functionality
-	  is known to be incomplete.
-
-	  You should say N unless you know you need this.
-
 config ISA_BUS
 	bool "ISA bus support on modern systems" if EXPERT
 	help
diff --git a/arch/x86/pci/Makefile b/arch/x86/pci/Makefile
index 48bcada5cabe..ca343d8c7964 100644
--- a/arch/x86/pci/Makefile
+++ b/arch/x86/pci/Makefile
@@ -22,6 +22,5 @@ obj-y				+= common.o early.o
 obj-y				+= bus_numa.o
 
 obj-$(CONFIG_AMD_NB)		+= amd_bus.o
-obj-$(CONFIG_PCI_CNB20LE_QUIRK)	+= broadcom_bus.o
 
 ccflags-$(CONFIG_PCI_DEBUG)	+= -DDEBUG
diff --git a/arch/x86/pci/broadcom_bus.c b/arch/x86/pci/broadcom_bus.c
deleted file mode 100644
index 2db73613cada..000000000000
--- a/arch/x86/pci/broadcom_bus.c
+++ /dev/null
@@ -1,112 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-/*
- * Read address ranges from a Broadcom CNB20LE Host Bridge
- *
- * Copyright (c) 2010 Ira W. Snyder <iws@ovro.caltech.edu>
- */
-
-#include <linux/acpi.h>
-#include <linux/delay.h>
-#include <linux/dmi.h>
-#include <linux/pci.h>
-#include <linux/init.h>
-#include <asm/pci_x86.h>
-#include <asm/pci-direct.h>
-
-#include "bus_numa.h"
-
-static void __init cnb20le_res(u8 bus, u8 slot, u8 func)
-{
-	struct pci_root_info *info;
-	struct pci_root_res *root_res;
-	struct resource res;
-	u16 word1, word2;
-	u8 fbus, lbus;
-
-	/* read the PCI bus numbers */
-	fbus = read_pci_config_byte(bus, slot, func, 0x44);
-	lbus = read_pci_config_byte(bus, slot, func, 0x45);
-	info = alloc_pci_root_info(fbus, lbus, 0, 0);
-
-	/*
-	 * Add the legacy IDE ports on bus 0
-	 *
-	 * These do not exist anywhere in the bridge registers, AFAICT. I do
-	 * not have the datasheet, so this is the best I can do.
-	 */
-	if (fbus == 0) {
-		update_res(info, 0x01f0, 0x01f7, IORESOURCE_IO, 0);
-		update_res(info, 0x03f6, 0x03f6, IORESOURCE_IO, 0);
-		update_res(info, 0x0170, 0x0177, IORESOURCE_IO, 0);
-		update_res(info, 0x0376, 0x0376, IORESOURCE_IO, 0);
-		update_res(info, 0xffa0, 0xffaf, IORESOURCE_IO, 0);
-	}
-
-	/* read the non-prefetchable memory window */
-	word1 = read_pci_config_16(bus, slot, func, 0xc0);
-	word2 = read_pci_config_16(bus, slot, func, 0xc2);
-	if (word1 != word2) {
-		res.start = ((resource_size_t) word1 << 16) | 0x0000;
-		res.end   = ((resource_size_t) word2 << 16) | 0xffff;
-		res.flags = IORESOURCE_MEM;
-		update_res(info, res.start, res.end, res.flags, 0);
-	}
-
-	/* read the prefetchable memory window */
-	word1 = read_pci_config_16(bus, slot, func, 0xc4);
-	word2 = read_pci_config_16(bus, slot, func, 0xc6);
-	if (word1 != word2) {
-		res.start = ((resource_size_t) word1 << 16) | 0x0000;
-		res.end   = ((resource_size_t) word2 << 16) | 0xffff;
-		res.flags = IORESOURCE_MEM | IORESOURCE_PREFETCH;
-		update_res(info, res.start, res.end, res.flags, 0);
-	}
-
-	/* read the IO port window */
-	word1 = read_pci_config_16(bus, slot, func, 0xd0);
-	word2 = read_pci_config_16(bus, slot, func, 0xd2);
-	if (word1 != word2) {
-		res.start = word1;
-		res.end   = word2;
-		res.flags = IORESOURCE_IO;
-		update_res(info, res.start, res.end, res.flags, 0);
-	}
-
-	/* print information about this host bridge */
-	res.start = fbus;
-	res.end   = lbus;
-	res.flags = IORESOURCE_BUS;
-	printk(KERN_INFO "CNB20LE PCI Host Bridge (domain 0000 %pR)\n", &res);
-
-	list_for_each_entry(root_res, &info->resources, list)
-		printk(KERN_INFO "host bridge window %pR\n", &root_res->res);
-}
-
-static int __init broadcom_postcore_init(void)
-{
-	u8 bus = 0, slot = 0;
-	u32 id;
-	u16 vendor, device;
-
-#ifdef CONFIG_ACPI
-	/*
-	 * We should get host bridge information from ACPI unless the BIOS
-	 * doesn't support it.
-	 */
-	if (!acpi_disabled && acpi_os_get_root_pointer())
-		return 0;
-#endif
-
-	id = read_pci_config(bus, slot, 0, PCI_VENDOR_ID);
-	vendor = id & 0xffff;
-	device = (id >> 16) & 0xffff;
-
-	if (vendor == PCI_VENDOR_ID_SERVERWORKS &&
-	    device == PCI_DEVICE_ID_SERVERWORKS_LE) {
-		cnb20le_res(bus, slot, 0);
-		cnb20le_res(bus, slot, 1);
-	}
-	return 0;
-}
-
-postcore_initcall(broadcom_postcore_init);
diff --git a/arch/x86/pci/bus_numa.c b/arch/x86/pci/bus_numa.c
index 2752c02e3f0e..b4f5e668812e 100644
--- a/arch/x86/pci/bus_numa.c
+++ b/arch/x86/pci/bus_numa.c
@@ -59,7 +59,7 @@ void x86_pci_root_bus_resources(int bus, struct list_head *resources)
 default_resources:
 	/*
 	 * We don't have any host bridge aperture information from the
-	 * "native host bridge drivers," e.g., amd_bus or broadcom_bus,
+	 * "native host bridge drivers", e.g. amd_bus,
 	 * so fall back to the defaults historically used by pci_create_bus().
 	 */
 	printk(KERN_DEBUG "PCI: root bus %02x: using default resources\n", bus);
