From patchwork Tue Apr 12 09:40:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Herve Codina X-Patchwork-Id: 12810498 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67D41C4321E for ; Tue, 12 Apr 2022 11:04:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S243822AbiDLLCc (ORCPT ); Tue, 12 Apr 2022 07:02:32 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55444 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231740AbiDLLAU (ORCPT ); Tue, 12 Apr 2022 07:00:20 -0400 Received: from mslow1.mail.gandi.net (mslow1.mail.gandi.net [217.70.178.240]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id AD3646542F; Tue, 12 Apr 2022 02:50:57 -0700 (PDT) Received: from relay2-d.mail.gandi.net (unknown [IPv6:2001:4b98:dc4:8::222]) by mslow1.mail.gandi.net (Postfix) with ESMTP id 79D4CC9AAC; Tue, 12 Apr 2022 09:41:08 +0000 (UTC) Received: (Authenticated sender: herve.codina@bootlin.com) by mail.gandi.net (Postfix) with ESMTPA id 8860940013; Tue, 12 Apr 2022 09:41:01 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=gm1; t=1649756463; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=MfannK3QOQ45mUCEGsLWIr5LFWwkEtDChoSFbRDqcCo=; b=nc6lkIMczs77x6m+MswMNTcy1CeSWqYj4JhTACTtyEHOS9ku7ltpbUdRsUQ+yVGUKhVDuK tX88DBIYt00l91GqKhUl5N3hzRwVoIEVWJE0UVsPs39dWRBfEqnu/RjdP069GzfBF2pKV8 wxBbogplR9Aw1JQqKZHodPJw9HDJWePovdRqVAIHVDIcMZKkUF2hobbeBrX/2/Pl2uSNsg Ps5zCBtvg8pNjYM9xItyYnEjc2zWAHa3s6HaMPfSzu3/ZmmAvA9XBvf1025dx2qrocNSTv 4LWol6kAGlICIiq3tGs3CxLxMBKqGxylPNypSwbQsFRDGDXc6qxsfUVpAzr2GA== From: Herve Codina To: Marek Vasut , Yoshihiro Shimoda , Bjorn Helgaas , Rob Herring , Krzysztof Kozlowski , Geert Uytterhoeven , Magnus Damm , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= Cc: Rob Herring , linux-pci@vger.kernel.org, linux-renesas-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Petazzoni , Clement Leger , Miquel Raynal , Herve Codina Subject: [PATCH 4/6] ARM: dts: r9a06g032: Add internal PCI bridge node Date: Tue, 12 Apr 2022 11:40:27 +0200 Message-Id: <20220412094029.287562-5-herve.codina@bootlin.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220412094029.287562-1-herve.codina@bootlin.com> References: <20220412094029.287562-1-herve.codina@bootlin.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Add the device node for the r9a06g032 internal PCI bridge device. Signed-off-by: Herve Codina --- arch/arm/boot/dts/r9a06g032.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi index 636a6ab31c58..c6a99b2a8fb3 100644 --- a/arch/arm/boot/dts/r9a06g032.dtsi +++ b/arch/arm/boot/dts/r9a06g032.dtsi @@ -211,6 +211,34 @@ gic: interrupt-controller@44101000 { interrupts = ; }; + + pci_usb: pci@40030000 { + compatible = "renesas,pci-r9a06g032", "renesas,pci-rzn1"; + device_type = "pci"; + clocks = <&sysctrl R9A06G032_HCLK_USBH>, + <&sysctrl R9A06G032_HCLK_USBPM>, + <&sysctrl R9A06G032_CLK_PCI_USB>; + clock-names = "hclk_usbh", "hclk_usbpm", "clk_pci_usb"; + reg = <0x40030000 0xc00>, + <0x40020000 0x1100>; + interrupts = ; + status = "disabled"; + + bus-range = <0 0>; + #address-cells = <3>; + #size-cells = <2>; + #interrupt-cells = <1>; + ranges = <0x02000000 0 0x40020000 0x40020000 0 0x00010000>; + /* Should map all possible DDR as inbound ranges, but + * the IP only supports a 256MB, 512MB, or 1GB window. + * flags, PCI addr (64-bit), CPU addr, PCI size (64-bit) + */ + dma-ranges = <0x42000000 0 0x80000000 0x80000000 0 0x40000000>; + interrupt-map-mask = <0xff00 0 0 0x7>; + interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH + 0x0800 0 0 1 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH + 0x1000 0 0 2 &gic GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + }; }; timer {