| Message ID | 20220503214638.1895-4-Sergey.Semin@baikalelectronics.ru (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 2fc75241c3c5dd21e16b1a5ef2304bda61186058 |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | PCI: dwc: Add dma-ranges/YAML-schema/Baikal-T1 support | expand |
On Wed, May 04, 2022 at 12:46:24AM +0300, Serge Semin wrote: > Printing just "link up" isn't that much informative especially when it > comes to working with the PCI Express bus. Even if the link is up, due to > multiple reasons the bus performance can degrade to slower speeds or to > narrower width than both Root Port and its partner is capable of. In that > case it would be handy to know the link specifications as early as > possible. So let's add a more verbose message to the busy-wait link-state > method, which will contain the link speed generation and the PCIe bus > width in case if the link up state is discovered. Otherwise an error will > be printed to the system log. > > Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> > > --- > > Changelog v2: > - Test the error condition first and return straight away if it comes true. > The typical return is better to be unindented (@Joe). > --- > drivers/pci/controller/dwc/pcie-designware.c | 22 ++++++++++++++------ > 1 file changed, 16 insertions(+), 6 deletions(-) Reviewed-by: Rob Herring <robh@kernel.org>
diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c index 6e81264fdfb4..1682f477bf20 100644 --- a/drivers/pci/controller/dwc/pcie-designware.c +++ b/drivers/pci/controller/dwc/pcie-designware.c @@ -524,20 +524,30 @@ void dw_pcie_disable_atu(struct dw_pcie *pci, int index, int dw_pcie_wait_for_link(struct dw_pcie *pci) { + u32 offset, val; int retries; /* Check if the link is up or not */ for (retries = 0; retries < LINK_WAIT_MAX_RETRIES; retries++) { - if (dw_pcie_link_up(pci)) { - dev_info(pci->dev, "Link up\n"); - return 0; - } + if (dw_pcie_link_up(pci)) + break; + usleep_range(LINK_WAIT_USLEEP_MIN, LINK_WAIT_USLEEP_MAX); } - dev_info(pci->dev, "Phy link never came up\n"); + if (retries >= LINK_WAIT_MAX_RETRIES) { + dev_err(pci->dev, "Phy link never came up\n"); + return -ETIMEDOUT; + } + + offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP); + val = dw_pcie_readw_dbi(pci, offset + PCI_EXP_LNKSTA); - return -ETIMEDOUT; + dev_info(pci->dev, "PCIe Gen.%u x%u link up\n", + FIELD_GET(PCI_EXP_LNKSTA_CLS, val), + FIELD_GET(PCI_EXP_LNKSTA_NLW, val)); + + return 0; } EXPORT_SYMBOL_GPL(dw_pcie_wait_for_link);
Printing just "link up" isn't that much informative especially when it comes to working with the PCI Express bus. Even if the link is up, due to multiple reasons the bus performance can degrade to slower speeds or to narrower width than both Root Port and its partner is capable of. In that case it would be handy to know the link specifications as early as possible. So let's add a more verbose message to the busy-wait link-state method, which will contain the link speed generation and the PCIe bus width in case if the link up state is discovered. Otherwise an error will be printed to the system log. Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> --- Changelog v2: - Test the error condition first and return straight away if it comes true. The typical return is better to be unindented (@Joe). --- drivers/pci/controller/dwc/pcie-designware.c | 22 ++++++++++++++------ 1 file changed, 16 insertions(+), 6 deletions(-)