| Message ID | 20220802120624.19258-1-jianjun.wang@mediatek.com (mailing list archive) |
|---|---|
| State | Accepted |
| Delegated to: | Lorenzo Pieralisi |
| Headers | show |
| Series | [v4] dt-bindings: PCI: mediatek-gen3: Add support for MT8188 and MT8195 | expand |
On 02/08/2022 14:06, Jianjun Wang wrote: > MT8188 and MT8195 are ARM platform SoCs with the same PCIe IP as MT8192. > > Also add new clock name "peri_mem" since the MT8188 and MT8195 use clock > "peri_mem" instead of "top_133m". > > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> > --- > Changes in v4: > Remove "items" for "mediatek,mt8192-pcie" since it only have one item. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Best regards, Krzysztof
Hi Maintainers, Gentle ping for this patch, if there is anything I need to modify, please kindly let me know. Thanks. On Tue, 2022-08-02 at 20:06 +0800, Jianjun Wang wrote: > MT8188 and MT8195 are ARM platform SoCs with the same PCIe IP as > MT8192. > > Also add new clock name "peri_mem" since the MT8188 and MT8195 use > clock > "peri_mem" instead of "top_133m". > > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> > --- > Changes in v4: > Remove "items" for "mediatek,mt8192-pcie" since it only have one > item. > > Changes in v3: > Use enum property to add the new clock name. > > Changes in v2: > Merge two patches into one. > --- > .../devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 13 > +++++++++++-- > 1 file changed, 11 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie- > gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie- > gen3.yaml > index 0499b94627ae..c00be39af64e 100644 > --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml > @@ -48,7 +48,13 @@ allOf: > > properties: > compatible: > - const: mediatek,mt8192-pcie > + oneOf: > + - items: > + - enum: > + - mediatek,mt8188-pcie > + - mediatek,mt8195-pcie > + - const: mediatek,mt8192-pcie > + - const: mediatek,mt8192-pcie > > reg: > maxItems: 1 > @@ -84,7 +90,9 @@ properties: > - const: tl_96m > - const: tl_32k > - const: peri_26m > - - const: top_133m > + - enum: > + - top_133m # for MT8192 > + - peri_mem # for MT8188/MT8195 > > assigned-clocks: > maxItems: 1 > @@ -126,6 +134,7 @@ required: > - interrupts > - ranges > - clocks > + - clock-names > - '#interrupt-cells' > - interrupt-controller >
On Wed, Aug 03, 2022 at 08:44:11AM +0200, Krzysztof Kozlowski wrote: > On 02/08/2022 14:06, Jianjun Wang wrote: > > MT8188 and MT8195 are ARM platform SoCs with the same PCIe IP as MT8192. > > > > Also add new clock name "peri_mem" since the MT8188 and MT8195 use clock > > "peri_mem" instead of "top_133m". > > > > Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> > > --- > > Changes in v4: > > Remove "items" for "mediatek,mt8192-pcie" since it only have one item. > > > Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Should I pick this up ? Thanks, Lorenzo
On 23/08/2022 15:51, Lorenzo Pieralisi wrote: > On Wed, Aug 03, 2022 at 08:44:11AM +0200, Krzysztof Kozlowski wrote: >> On 02/08/2022 14:06, Jianjun Wang wrote: >>> MT8188 and MT8195 are ARM platform SoCs with the same PCIe IP as MT8192. >>> >>> Also add new clock name "peri_mem" since the MT8188 and MT8195 use clock >>> "peri_mem" instead of "top_133m". >>> >>> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> >>> --- >>> Changes in v4: >>> Remove "items" for "mediatek,mt8192-pcie" since it only have one item. >> >> >> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> > > Should I pick this up ? Yes, go ahead. Thanks! Best regards, Krzysztof
On Tue, 2 Aug 2022 20:06:24 +0800, Jianjun Wang wrote: > MT8188 and MT8195 are ARM platform SoCs with the same PCIe IP as MT8192. > > Also add new clock name "peri_mem" since the MT8188 and MT8195 use clock > "peri_mem" instead of "top_133m". > > Applied to pci/dt, thanks! [1/1] dt-bindings: PCI: mediatek-gen3: Add support for MT8188 and MT8195 https://git.kernel.org/lpieralisi/pci/c/7f08e806a03e Thanks, Lorenzo
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml index 0499b94627ae..c00be39af64e 100644 --- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml +++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml @@ -48,7 +48,13 @@ allOf: properties: compatible: - const: mediatek,mt8192-pcie + oneOf: + - items: + - enum: + - mediatek,mt8188-pcie + - mediatek,mt8195-pcie + - const: mediatek,mt8192-pcie + - const: mediatek,mt8192-pcie reg: maxItems: 1 @@ -84,7 +90,9 @@ properties: - const: tl_96m - const: tl_32k - const: peri_26m - - const: top_133m + - enum: + - top_133m # for MT8192 + - peri_mem # for MT8188/MT8195 assigned-clocks: maxItems: 1 @@ -126,6 +134,7 @@ required: - interrupts - ranges - clocks + - clock-names - '#interrupt-cells' - interrupt-controller
MT8188 and MT8195 are ARM platform SoCs with the same PCIe IP as MT8192. Also add new clock name "peri_mem" since the MT8188 and MT8195 use clock "peri_mem" instead of "top_133m". Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> --- Changes in v4: Remove "items" for "mediatek,mt8192-pcie" since it only have one item. Changes in v3: Use enum property to add the new clock name. Changes in v2: Merge two patches into one. --- .../devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-)