Message ID | 20220817230036.817-5-pali@kernel.org (mailing list archive) |
---|---|
State | Accepted |
Commit | 39319cac50a28ea8801710148024186472d2cf08 |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | PCI: mvebu: Add support for error interrupt | expand |
On Thu, Aug 18, 2022 at 01:00:36AM +0200, Pali Rohár wrote: > First PCIe controller on Dove SoC reports error interrupt via IRQ 15 > and second PCIe controller via IRQ 17. > > Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Andrew
diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 70d45d2b1258..9aee3cfd3e98 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -122,8 +122,8 @@ bus-range = <0x00 0xff>; #interrupt-cells = <1>; - interrupt-names = "intx"; - interrupts = <16>; + interrupt-names = "intx", "error"; + interrupts = <16>, <15>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie0_intc 0>, <0 0 0 2 &pcie0_intc 1>, @@ -151,8 +151,8 @@ bus-range = <0x00 0xff>; #interrupt-cells = <1>; - interrupt-names = "intx"; - interrupts = <18>; + interrupt-names = "intx", "error"; + interrupts = <18>, <17>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie1_intc 0>, <0 0 0 2 &pcie1_intc 1>,
First PCIe controller on Dove SoC reports error interrupt via IRQ 15 and second PCIe controller via IRQ 17. Signed-off-by: Pali Rohár <pali@kernel.org> --- arch/arm/boot/dts/dove.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)