From patchwork Wed Aug 17 23:00:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12946554 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 07F36C2BB41 for ; Wed, 17 Aug 2022 23:03:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242016AbiHQXDk (ORCPT ); Wed, 17 Aug 2022 19:03:40 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:34854 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231939AbiHQXDj (ORCPT ); Wed, 17 Aug 2022 19:03:39 -0400 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DED94A5708; Wed, 17 Aug 2022 16:03:36 -0700 (PDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 6FE4C60F60; Wed, 17 Aug 2022 23:03:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id A846DC43470; Wed, 17 Aug 2022 23:03:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1660777415; bh=KZLubd2ER143QJviW3BMyWdDW8TOYgbY/8Bd6Py8KhQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=DVauo0+sNwDDiDjJkbu0qgyk4GO5MzrJwxg5Wh85uF4lhGNiMGNXkaUBqqL48N8yN a9E1iYxbHChar95PxG+i/BnKheJ4tr9fvbkqGTzIGEOTf55c1r9xm8Ij4d1i2AMDJ4 tX2JFDCxsxqmLQB56mBzT1sIWS941fVg3Gtmkh7cOYzHFCXH904N3Hghkh1VoVpkkj aiiNZ+H3z8uI/4yAPGNoOfnMxOii/CdbZbLsAuB+Iep51MbbH3p6w+Fng/PVvI9mhc Hu3oKJNKnG4tbLwpvTceXHSTKAFfMPBopQ+Pwvs3ygTaSUkZoLEK+GJdcge9QxOH1v OyBA6GmI+4pqw== Received: by pali.im (Postfix) id 6267977A; Thu, 18 Aug 2022 01:03:35 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilcz?= =?utf-8?q?y=C5=84ski?= , Bjorn Helgaas , Rob Herring , Andrew Lunn , Sebastian Hesselbarth , Gregory Clement , Thomas Petazzoni Cc: linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/4] ARM: dts: dove: Add definitions for PCIe error interrupts Date: Thu, 18 Aug 2022 01:00:36 +0200 Message-Id: <20220817230036.817-5-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220817230036.817-1-pali@kernel.org> References: <20220817230036.817-1-pali@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org First PCIe controller on Dove SoC reports error interrupt via IRQ 15 and second PCIe controller via IRQ 17. Signed-off-by: Pali Rohár Reviewed-by: Andrew Lunn --- arch/arm/boot/dts/dove.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/dove.dtsi b/arch/arm/boot/dts/dove.dtsi index 70d45d2b1258..9aee3cfd3e98 100644 --- a/arch/arm/boot/dts/dove.dtsi +++ b/arch/arm/boot/dts/dove.dtsi @@ -122,8 +122,8 @@ bus-range = <0x00 0xff>; #interrupt-cells = <1>; - interrupt-names = "intx"; - interrupts = <16>; + interrupt-names = "intx", "error"; + interrupts = <16>, <15>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie0_intc 0>, <0 0 0 2 &pcie0_intc 1>, @@ -151,8 +151,8 @@ bus-range = <0x00 0xff>; #interrupt-cells = <1>; - interrupt-names = "intx"; - interrupts = <18>; + interrupt-names = "intx", "error"; + interrupts = <18>, <17>; interrupt-map-mask = <0 0 0 7>; interrupt-map = <0 0 0 1 &pcie1_intc 0>, <0 0 0 2 &pcie1_intc 1>,