Message ID | 20220902142202.2437658-5-daire.mcnamara@microchip.com (mailing list archive) |
---|---|
State | Changes Requested |
Delegated to: | Lorenzo Pieralisi |
Headers | show |
Series | PCI: microchip: apportion address translation between rootport and FPGA | expand |
On Fri, Sep 02, 2022 at 03:22:02PM +0100, daire.mcnamara@microchip.com wrote: > From: Daire McNamara <daire.mcnamara@microchip.com> > > PCI ranges can contain addresses where phys.high part can have a type > of 0, signifying 'configuration space'. Change > devm_of_pci_get_host_bridge_resources() to print 'CFG' instead of 'err' > for a PCI range containing such a 'configuration space' type. Generally, putting config space into ranges is wrong. It should be in 'reg' Rob
diff --git a/drivers/pci/of.c b/drivers/pci/of.c index 196834ed44fe..d782ad8c7dce 100644 --- a/drivers/pci/of.c +++ b/drivers/pci/of.c @@ -319,6 +319,8 @@ static int devm_of_pci_get_host_bridge_resources(struct device *dev, range_type = "IO"; else if ((range.flags & IORESOURCE_TYPE_BITS) == IORESOURCE_MEM) range_type = "MEM"; + else if ((range.flags & IORESOURCE_TYPE_BITS) == 0) + range_type = "CFG"; else range_type = "err"; dev_info(dev, " %6s %#012llx..%#012llx -> %#012llx\n",