From patchwork Fri Sep 9 09:14:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 12971298 X-Patchwork-Delegate: lorenzo.pieralisi@arm.com Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 702BEECAAD3 for ; Fri, 9 Sep 2022 09:14:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231790AbiIIJOo (ORCPT ); Fri, 9 Sep 2022 05:14:44 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:57088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231960AbiIIJOm (ORCPT ); Fri, 9 Sep 2022 05:14:42 -0400 Received: from mail-lf1-x135.google.com (mail-lf1-x135.google.com [IPv6:2a00:1450:4864:20::135]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3F51F1F61F for ; Fri, 9 Sep 2022 02:14:38 -0700 (PDT) Received: by mail-lf1-x135.google.com with SMTP id f11so1634182lfa.6 for ; Fri, 09 Sep 2022 02:14:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date; bh=yo3fzEL2MH9/Z5sCPMvSryXTswiCiE4zCueiwPbmMJw=; b=I09q540wNgASCcfzkVQFssE8sMbveIIhcA6Z09GplrHWUYsk8KFZbvf43Zird/1nn2 zNSKcIXJwooz5QySJVxaAH9LJuCgA+il9evcpFbs4IydwQAgjKAbjt4sRdWA6hZ+Rm3U dTkNUUBAypaE1sovauis+U2JEbyKS9BRsp3qc+nLNqpPqMWtwlKZwX9OYhIzK9qAatCM ESrGoRMHVsJ6o78GhTHdh1+EAo0sYG3FyrQ6uMtU1g+mozXzySNZSlIUGeKVgC8sohTt tIcu9lqyAoXZLKdcVe6cujzu5u7Xuym/XtKohvMSknSDAtjfKSmvsPDYEutGx57AX7AO fOSg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date; bh=yo3fzEL2MH9/Z5sCPMvSryXTswiCiE4zCueiwPbmMJw=; b=ROudv+CbhpBT8zx3e++nVmwdAQK5zoeRcPN9nJwlQ/sti9XA6QdF8sgGcNXCD55Mp4 theMUmNRybmzgW1CiSnJHernbPfF+t5BqOSZQ4BzdOFjZZzIBfgtvDHPB3/rR7HDSorF 7SzZwJ2wVwqDNiEI3qQB5ziD7rJXt9QqV788+zPAxVKoO5F9rcVB1Hj9UBqbF56g3TNM oAMFqrG84T20ZqanhJnn/TSQoxQf+UtEZQiHc7/m/rvV6Vsy95bUhU3Ql4id2010NJ7O FCBI9fSjcPXUI7I6juCyxwqqMdQT3qdIo9BlE5Mb7p45jWQhIIB6hzScvP1rEOECykE1 fv8A== X-Gm-Message-State: ACgBeo2EEh37jfftfKDph5RtiG4YfJ9FwR6FpvW1jNXC7awKAkPGXUPs 3XoAy1iBPfjhkAyLFPU3a3ak9Q== X-Google-Smtp-Source: AA6agR7zjwZxZLgPdwIfmRIGIY6qewPODEd+YdPLR/bq/XdiO2fld+WmNT11SsXRIBXgOfiXe4ZTjw== X-Received: by 2002:a05:6512:b11:b0:492:edb9:9d74 with SMTP id w17-20020a0565120b1100b00492edb99d74mr4000341lfu.663.1662714876660; Fri, 09 Sep 2022 02:14:36 -0700 (PDT) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id z26-20020a2e4c1a000000b0026acbb6ed1asm201615lja.66.2022.09.09.02.14.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 09 Sep 2022 02:14:35 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Konrad Dybcio , Rob Herring , Jingoo Han , Gustavo Pimentel , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , Bjorn Helgaas , Vinod Koul , Kishon Vijay Abraham I Cc: Philipp Zabel , Johan Hovold , linux-arm-msm@vger.kernel.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org Subject: [PATCH v3 2/9] phy: qcom-qmp-pcie: drop if (table) conditions Date: Fri, 9 Sep 2022 12:14:26 +0300 Message-Id: <20220909091433.3715981-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220909091433.3715981-1-dmitry.baryshkov@linaro.org> References: <20220909091433.3715981-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org Drop unused if (table) conditions, since the function qcom_qmp_phy_pcie_configure_lane() has this check anyway. Signed-off-by: Dmitry Baryshkov --- drivers/phy/qualcomm/phy-qcom-qmp-pcie.c | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c index 3ddbb8e89f04..536a6ac835c1 100644 --- a/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c +++ b/drivers/phy/qualcomm/phy-qcom-qmp-pcie.c @@ -1930,8 +1930,7 @@ static int qcom_qmp_phy_pcie_serdes_init(struct qmp_phy *qphy) int serdes_tbl_num = cfg->serdes_tbl_num; qcom_qmp_phy_pcie_configure(serdes, cfg->regs, serdes_tbl, serdes_tbl_num); - if (cfg->serdes_tbl_sec) - qcom_qmp_phy_pcie_configure(serdes, cfg->regs, cfg->serdes_tbl_sec, + qcom_qmp_phy_pcie_configure(serdes, cfg->regs, cfg->serdes_tbl_sec, cfg->serdes_tbl_num_sec); return 0; @@ -2037,44 +2036,38 @@ static int qcom_qmp_phy_pcie_power_on(struct phy *phy) /* Tx, Rx, and PCS configurations */ qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num, 1); - if (cfg->tx_tbl_sec) - qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec, + qcom_qmp_phy_pcie_configure_lane(tx, cfg->regs, cfg->tx_tbl_sec, cfg->tx_tbl_num_sec, 1); /* Configuration for other LANE for USB-DP combo PHY */ if (cfg->is_dual_lane_phy) { qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs, cfg->tx_tbl, cfg->tx_tbl_num, 2); - if (cfg->tx_tbl_sec) - qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs, + qcom_qmp_phy_pcie_configure_lane(qphy->tx2, cfg->regs, cfg->tx_tbl_sec, cfg->tx_tbl_num_sec, 2); } qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num, 1); - if (cfg->rx_tbl_sec) - qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs, + qcom_qmp_phy_pcie_configure_lane(rx, cfg->regs, cfg->rx_tbl_sec, cfg->rx_tbl_num_sec, 1); if (cfg->is_dual_lane_phy) { qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs, cfg->rx_tbl, cfg->rx_tbl_num, 2); - if (cfg->rx_tbl_sec) - qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs, + qcom_qmp_phy_pcie_configure_lane(qphy->rx2, cfg->regs, cfg->rx_tbl_sec, cfg->rx_tbl_num_sec, 2); } qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl, cfg->pcs_tbl_num); - if (cfg->pcs_tbl_sec) - qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl_sec, + qcom_qmp_phy_pcie_configure(pcs, cfg->regs, cfg->pcs_tbl_sec, cfg->pcs_tbl_num_sec); qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl, cfg->pcs_misc_tbl_num); - if (cfg->pcs_misc_tbl_sec) - qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec, + qcom_qmp_phy_pcie_configure(pcs_misc, cfg->regs, cfg->pcs_misc_tbl_sec, cfg->pcs_misc_tbl_num_sec); /*