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Tue, 25 Oct 2022 01:53:05 -0500 From: Thippeswamy Havalige To: , , , CC: , , , , , "Thippeswamy Havalige" Subject: [PATCH 03/13] microblaze/PCI: Remove unused PCI bus scan if configured as a host Date: Tue, 25 Oct 2022 12:22:04 +0530 Message-ID: <20221025065214.4663-4-thippeswamy.havalige@amd.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20221025065214.4663-1-thippeswamy.havalige@amd.com> References: <20221025065214.4663-1-thippeswamy.havalige@amd.com> MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DM6NAM11FT029:EE_|DM4PR12MB5152:EE_ X-MS-Office365-Filtering-Correlation-Id: a511c590-84fb-46a7-0505-08dab655932e X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: Od4pOhVnl3uK97cbtJwnzH91FsnyeYiMUXjcaYDlLdSnuvRiNpiW5Nk2cHoCBXq0sKBDwgiur9dnnVcJwZaY3S8wvrmPnQI5edRILrIjVlmpzxRxTiJSPfysAuJW+Ww86jNr2sUkLH/MFMjUy/WXGQbxgMSARPcdAIAJX+hPfotejdJjmVDYYQaDBfPG4l+XdqiPsfqmaSlMTXfskyPkrV0JvIhGGLbkgkK7Kr/IQeS3frXysJhVa/ReXVu4GzXvkDoOJw/ANsdyn0ep1wQ512+sr5MkFLfxpA7bGes1CvCNHQK1pPvX+DRqjeR8ygZ6gqfvCDaygwokTKYMZJsOD4cchmYAgxt6ocYm24UIhDcchpqrz/NGt3jRxTiXrZdScZNTGgNC2uSxvf+vpEUM8deuTgWyrbKbg0v7Y/od1AFUiF8s2zcYEEFWBarplMnKXTZbe98AC2cZJl5L/CoEKEkZ4IPk9b3rhR3NE//vW5CnKaNJS+XnZBCaJ1mVRmiuPMQl87XlOosQpfRxaLn03AnnzfqeXPTYJEmexckNX/S+ZNmN+lar/R2YtKZJmQCKSGxdEnDOR7DncGdgeXfItDRgvWcYbGb+M5VbgU4fLCoZ2wuLE10HXuUWwJAOOOslRsWdpo6826biuJg98hWFxt9DFfL7bmtGAnQdJDE7AnptuR3yNPlWSpOL98DiLBzVHUbwnS578znW5MYQdr1wI1WiW2/oOtrzfNbMFkgVTrxArgskaRJ+Eo61WUHBJDlVzCwYFeZWAGpKYrUu7RnhoMhd6F90Keg1chhRO3X0iKo= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB04.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230022)(4636009)(346002)(376002)(136003)(396003)(39860400002)(451199015)(46966006)(40470700004)(36840700001)(2616005)(36756003)(40480700001)(2906002)(54906003)(1076003)(70586007)(36860700001)(110136005)(336012)(41300700001)(316002)(70206006)(8936002)(82740400003)(81166007)(86362001)(5660300002)(8676002)(4326008)(44832011)(426003)(40460700003)(478600001)(26005)(82310400005)(186003)(47076005)(356005)(83380400001)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 25 Oct 2022 06:53:08.3307 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a511c590-84fb-46a7-0505-08dab655932e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: DM6NAM11FT029.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM4PR12MB5152 Precedence: bulk List-ID: X-Mailing-List: linux-pci@vger.kernel.org This routine is meant to be used early during boot, when the PCI bus numbers have not yet been assigned, and you need to issue PCI config cycles to an OF device. It could also be used to "fix" RTAS config cycles if you want to set pci_assign_all_buses to 1 and still use RTAS for PCI config cycles. Signed-off-by: Thippeswamy Havalige --- arch/microblaze/include/asm/pci-bridge.h | 4 ---- arch/microblaze/pci/pci-common.c | 19 ------------------- 2 files changed, 23 deletions(-) diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h index a9d3940..ce74b0c 100644 --- a/arch/microblaze/include/asm/pci-bridge.h +++ b/arch/microblaze/include/asm/pci-bridge.h @@ -107,10 +107,6 @@ extern void setup_indirect_pci(struct pci_controller *hose, resource_size_t cfg_addr, resource_size_t cfg_data, u32 flags); -/* Get the PCI host controller for an OF device */ -extern struct pci_controller *pci_find_hose_for_OF_device( - struct device_node *node); - /* Fill up host controller resources from the OF node */ extern void pci_process_bridge_OF_ranges(struct pci_controller *hose, struct device_node *dev, int primary); diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c index 58397cf..6ccaf33 100644 --- a/arch/microblaze/pci/pci-common.c +++ b/arch/microblaze/pci/pci-common.c @@ -122,25 +122,6 @@ unsigned long pci_address_to_pio(phys_addr_t address) } EXPORT_SYMBOL_GPL(pci_address_to_pio); -/* This routine is meant to be used early during boot, when the - * PCI bus numbers have not yet been assigned, and you need to - * issue PCI config cycles to an OF device. - * It could also be used to "fix" RTAS config cycles if you want - * to set pci_assign_all_buses to 1 and still use RTAS for PCI - * config cycles. - */ -struct pci_controller *pci_find_hose_for_OF_device(struct device_node *node) -{ - while (node) { - struct pci_controller *hose, *tmp; - list_for_each_entry_safe(hose, tmp, &hose_list, list_node) - if (hose->dn == node) - return hose; - node = node->parent; - } - return NULL; -} - void pcibios_set_master(struct pci_dev *dev) { /* No special bus mastering setup handling */